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path: root/include/linux/usb/functionfs.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __LINUX_FUNCTIONFS_H__
#define __LINUX_FUNCTIONFS_H__ 1

#include <uapi/linux/usb/functionfs.h>

#endif
generated by cgit v1.2.3 (git 2.46.0) at 2026-07-22 21:47:52 +0000
mdgpu/sdma_v7_1.c?h=master&id=3fc4648b53b7e393b91e63600e28e6f25c8ef0c5&showmsg=1'>sdma_v7_1.c
AgeCommit message (Collapse)Author
2026-01-27drm/amdgpu/mes: Remove idr leftovers v2Tvrtko Ursulin
Commit cb17fff3a254 ("drm/amdgpu/mes: remove unused functions") removed most of the code using these IDRs but forgot to remove the struct members and init/destroy paths. There is also interrupt handling code in SDMA 5.0 and 5.2 which appears to be using it, but is is unreachable since nothing ever allocates the relevant IDR. We replace those with one time warnings just to avoid any functional difference, but it is also possible they should be removed. v2: also fix up gfx_v12_1.c and sdma_v7_1.c Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> References: cb17fff3a254 ("drm/amdgpu/mes: remove unused functions") Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: make normalize reg addr to common func for soc v1Likun Gao
Normalize registers address to local xcc address for sdma v7_1. Merge normalize register address function to an common function for soc v1. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: adjust xcc_id program logic for sdma v7_1Likun Gao
Adjust program logic for sdam v7_1, only use physical xcc_id when program register to support compute partition. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amdgpu: Add gfx v12_1 interrupt source headerHawking Zhang
To acommandate specific interrupt source for gfx v12_1 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amdgpu: Correct inst_id input from physical to logicLikun Gao
Correct inst_id input from physical to logic for sdma v7_1. V2: Show real instance number on logic xcc. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amdgpu: Add soc v1_0 ih client id tableHawking Zhang
To acommandate the specific ih client for soc v1_0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu/sdma_v7_1: Add missing inst_mask entry in sdma_v7_1_inst_gfx_resume()Srinivasan Shanmugam
The comment for sdma_v7_1_inst_gfx_resume() did not include the inst_mask parameter, even though the function takes it as an argument. Update the comment to document inst_mask as the mask of SDMA engine instances to be enabled. Fixes the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c:644 function parameter 'inst_mask' not described in 'sdma_v7_1_inst_gfx_resume' Cc: Likun Gao <Likun.Gao@amd.com> Cc: Le Ma <le.ma@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: remove hdp flush/invalidation completely for gfx12.1.0/sdma7.1.0Le Ma
Remove the hdp operation and interfaces as the HDP hw does not exist. v2: add checks to see if hdp funcs exists before do hdp flush/invalidation Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: Update Generate PTE/PDE SDMA packet for SDMA 7.1Mukul Joshi
Update the Generate PTE/PDE packet fields for SDMA 7.1. v2: squash in mtype fix (Mukul) Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: Add sdma v7_1_0 supportLikun Gao
Add SDMA ip block for SDMA v7_1_0. v2: squash in queue reset changes (Alex) v3: squash in version fix (Hawking) v4: squash in various fixes Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>