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Add support for selecting multiple TLMM regions using the
tlmm-test tool.
The current implementation only selects the TLMM Node region
0, which can lead to incorrect region selection.
QCS 615 TLMM Node dts reg:
tlmm: pinctrl@3100000 {
compatible = "qcom,qcs615-tlmm";
reg = <0x0 0x03100000 0x0 0x300000>,
<0x0 0x03500000 0x0 0x300000>,
<0x0 0x03d00000 0x0 0x300000>;
reg-names = "east",
"west",
"south";
QCS615 gpio57 is in the south region with an offset of 0x39000,
and its address is 0x3d39000. However, the default region selection
is region 0 (east region), resulting in a wrong calculated address
of 0x3139000.
Add a tlmm option parameter named tlmm_reg_name to select the region.
If the user does not input the parameter, the default region is 0.
Signed-off-by: Yuanjie Yang <quic_yuanjiey@quicinc.com>
Link: https://lore.kernel.org/20250624090600.91063-1-quic_yuanjiey@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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kunit_kzalloc() may return a NULL pointer, dereferencing it without
NULL check may lead to NULL dereference.
Add a NULL check for grp.
Fixes: c7984dc0a2b9 ("pinctrl: qcom: Add test case for TLMM interrupt handling")
Signed-off-by: Charles Han <hanchunchao@inspur.com>
Link: https://lore.kernel.org/20250325094932.4733-1-hanchunchao@inspur.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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In commit 'cf9d052aa600 ("pinctrl: qcom: Don't clear pending interrupts
when enabling")' Doug establishes an expectation that edge interrupts
occurring while an interrupt is disabled should be delivered once the
interrupt is enabled again.
Implement a test to validate that this is the case.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Link: https://lore.kernel.org/20250313-tlmm-test-disabled-irq-delivered-v1-1-f0be903732ac@oss.qualcomm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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While looking at the X1E PDC GPIO interrupts it became clear that we're
lacking a convenient and accessible way to validate if the TLMM
interrupt code performing as expected.
This introduces a kunit-based "hack" that relies on pin bias/pull
configuration to tickle the interrupt logic in non-connected pins to
allow us to evaluate that an expected number of interrupts are
delivered.
The bias/pull configuration is done with mmio accesses directly from the
test code, to avoid having to programmatically acquire and drive the
pinconf interface for the test pin. This limits the scalability of the
code to targets with a particular register layout, but serves our needs
for now.
The pin to be used for testing is specified by the tester using the
"tlmm-test.gpio" module parameter.
Worth mentioning is that some of the test cases currently fails for
GPIOs that is not backed by PDC (i.e. "non-wakeup" GPIOs), as lingering
latched interrupt state is being delivered at IRQ request time.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Link: https://lore.kernel.org/20250227-tlmm-test-v1-1-d18877b4a5db@oss.qualcomm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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