| Age | Commit message (Expand) | Author |
|---|---|---|
| 2025-09-02 | drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields | Krzysztof Kozlowski |
| 2025-07-04 | drm/msm/dsi/phy: Add support for SM8750 | Krzysztof Kozlowski |
| 2025-02-26 | drm/msm/dsi/phy: Use dsi_pll_cmn_clk_cfg1_update() when registering PLL | Krzysztof Kozlowski |
| 2025-02-15 | drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk source | Krzysztof Kozlowski |
| 2025-02-15 | drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver | Krzysztof Kozlowski |
| 2025-02-15 | drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver side | Krzysztof Kozlowski |
| 2024-04-22 | drm/msm: import XML display registers database | Dmitry Baryshkov |
