index
:
kernel
0x221E-v0.0-v7.0
0x221E-v0.0.1-v6.19
linux-2.6.11.y
linux-2.6.12.y
linux-2.6.13.y
linux-2.6.14.y
linux-2.6.15.y
linux-2.6.16.y
linux-2.6.17.y
linux-2.6.18.y
linux-2.6.19.y
linux-2.6.20.y
linux-2.6.21.y
linux-2.6.22.y
linux-2.6.23.y
linux-2.6.24.y
linux-2.6.25.y
linux-2.6.26.y
linux-2.6.27.y
linux-2.6.28.y
linux-2.6.29.y
linux-2.6.30.y
linux-2.6.31.y
linux-2.6.32.y
linux-2.6.33.y
linux-2.6.34.y
linux-2.6.35.y
linux-2.6.36.y
linux-2.6.37.y
linux-2.6.38.y
linux-2.6.39.y
linux-3.0.y
linux-3.1.y
linux-3.10.y
linux-3.11.y
linux-3.12.y
linux-3.13.y
linux-3.14.y
linux-3.15.y
linux-3.16.y
linux-3.17.y
linux-3.18.y
linux-3.19.y
linux-3.2.y
linux-3.3.y
linux-3.4.y
linux-3.5.y
linux-3.6.y
linux-3.7.y
linux-3.8.y
linux-3.9.y
linux-4.0.y
linux-4.1.y
linux-4.10.y
linux-4.11.y
linux-4.12.y
linux-4.13.y
linux-4.14.y
linux-4.15.y
linux-4.16.y
linux-4.17.y
linux-4.18.y
linux-4.19.y
linux-4.2.y
linux-4.20.y
linux-4.3.y
linux-4.4.y
linux-4.5.y
linux-4.6.y
linux-4.7.y
linux-4.8.y
linux-4.9.y
linux-5.0.y
linux-5.1.y
linux-5.10.y
linux-5.11.y
linux-5.12.y
linux-5.13.y
linux-5.14.y
linux-5.15.y
linux-5.16.y
linux-5.17.y
linux-5.18.y
linux-5.19.y
linux-5.2.y
linux-5.3.y
linux-5.4.y
linux-5.5.y
linux-5.6.y
linux-5.7.y
linux-5.8.y
linux-5.9.y
linux-6.0.y
linux-6.1.y
linux-6.10.y
linux-6.11.y
linux-6.12.y
linux-6.13.y
linux-6.14.y
linux-6.15.y
linux-6.16.y
linux-6.17.y
linux-6.18.y
linux-6.19.y
linux-6.2.y
linux-6.3.y
linux-6.4.y
linux-6.5.y
linux-6.6.y
linux-6.7.y
linux-6.8.y
linux-6.9.y
linux-rolling-lts
linux-rolling-stable
master
Hosts the 0x221E linux distro kernel.
Ubuntu
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path:
root
/
drivers
/
gpu
/
drm
/
i915
/
display
/
intel_cx0_phy.c
Age
Commit message (
Expand
)
Author
2025-12-24
drm/i915/cx0: Use the consolidated HDMI tables
Suraj Kandpal
2025-12-19
drm/i915/cx0: Toggle powerdown states for C10 on HDMI
Gustavo Sousa
2025-12-19
drm/i915/cx0: Use a more accurate message for powerdown change failure
Gustavo Sousa
2025-12-10
drm/i915/cx0: Convert C10 PHY PLL SSC state mismatch WARN to a debug message
Imre Deak
2025-12-01
drm/i915/power: convert intel_wakeref_t to struct ref_tracker *
Jani Nikula
2025-11-21
drm/i915/cx0: Read out power-down state of both PHY lanes for reversed lanes
Imre Deak
2025-11-21
drm/i915/cx0: Read out power-down state of both TXs in PHY lane 0
Imre Deak
2025-11-19
drm/i915/cx0: Enable dpll framework for MTL+
Mika Kahola
2025-11-19
drm/i915/cx0: Add MTL+ Thunderbolt PLL hooks
Imre Deak
2025-11-19
drm/i915/cx0: Add MTL+ .enable_clock/.disable clock hooks on DDI
Mika Kahola
2025-11-19
drm/i915/cx0: Add MTL+ .get_hw_state hook
Mika Kahola
2025-11-19
drm/i915/cx0: Add MTL+ .dump_hw_state hook
Mika Kahola
2025-11-19
drm/i915/cx0: Update C10/C20 state calculation
Mika Kahola
2025-11-19
drm/i915/cx0: Remove state verification
Mika Kahola
2025-11-19
drm/i915/cx0: Print additional Cx0 PLL HW state
Imre Deak
2025-11-19
drm/i915/cx0: Zero Cx0 PLL state before compute and HW readout
Imre Deak
2025-11-19
drm/i915/cx0: Determine Cx0 PLL port clock from PLL state
Imre Deak
2025-11-19
drm/i915/cx0: Determine Cx0 PLL DP mode from PLL state
Imre Deak
2025-11-19
drm/i915/cx0: Read out the Cx0 PHY SSC enabled state
Imre Deak
2025-11-19
drm/i915/cx0: Sanitize C10 PHY PLL SSC register setup
Imre Deak
2025-11-19
drm/i915/cx0: Track the Cx0 PHY enabled lane count in the PLL state
Imre Deak
2025-11-19
drm/i915/cx0: Move definition of Cx0 PHY functions earlier
Imre Deak
2025-11-19
drm/i915/cx0: Track the C20 PHY VDR state in the PLL state
Imre Deak
2025-11-19
drm/i915/cx0: Sanitize calculating C20 PLL state from tables
Imre Deak
2025-11-19
drm/i915/cx0: Sanitize setting the Cx0 PLL use_c10 flag
Imre Deak
2025-11-19
drm/i915/cx0: Factor out C10 msgbus access start/end helpers
Imre Deak
2025-11-11
drm/i915/de: Use intel_de_wait_for_{set,clear}_ms()
Ville Syrjälä
2025-11-11
drm/i915/de: Use intel_de_wait_for_{set,clear}_us()
Ville Syrjälä
2025-11-11
drm/i915/de: Use intel_de_wait_ms() for the obvious cases
Ville Syrjälä
2025-11-11
drm/i915/de: Use intel_de_wait_us()
Ville Syrjälä
2025-11-11
drm/i915/de: Include units in intel_de_wait*() function names
Ville Syrjälä
2025-11-07
drm/i915/cx0: s/XELPDP_PORT_RESET_END_TIMEOUT/XELPDP_PORT_RESET_END_TIMEOUT_MS/
Ville Syrjälä
2025-11-07
drm/i915/cx0: s/XELPDP_MSGBUS_TIMEOUT_SLOW/XELPDP_MSGBUS_TIMEOUT_MS/
Ville Syrjälä
2025-11-07
drm/i915/cx0: Get rid of XELPDP_MSGBUS_TIMEOUT_FAST_US
Ville Syrjälä
2025-11-07
drm/i915/cx0: Replace XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US with XELPDP_POR...
Ville Syrjälä
2025-11-07
drm/i915/cx0: Nuke extraneous timeout debugs
Ville Syrjälä
2025-11-01
drm/i915/ltphy: Define LT PHY PLL state verify function
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Hook up LT Phy Enable & Disable sequences
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Program the rest of the LT Phy Enable sequence
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Program the P2P Transaction flow for LT Phy
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Program the VDR PLL registers for LT PHY
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Read PHY_VDR_0_CONFIG register
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Add a wrapper for LT Phy powerdown change sequence
Suraj Kandpal
2025-11-01
drm/i915/cx0: Move the HDMI FRL function to intel_hdmi
Suraj Kandpal
2025-11-01
drm/i915/ltphy: Phy lane reset for LT Phy
Suraj Kandpal
2025-11-01
drm/i915/cx0: Change register bit naming for powerdown values
Suraj Kandpal
2025-10-31
drm/i915/display: switch to intel_display_utils.h
Jani Nikula
2025-10-16
drm/i915/display: Add missing clock to C10 PHY state compute/HW readout
Imre Deak
2025-10-16
drm/i915/display: Fix PHY_C20_VDR_HDMI_RATE programming
Imre Deak
2025-10-16
drm/i915/display: Fix PHY_C20_VDR_CUSTOM_SERDES_RATE programming
Imre Deak
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