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AgeCommit message (Expand)Author
2025-11-26arm64: dts: amlogic: s7: add ao secure nodeXianwei Zhao
2025-11-26arm64: dts: amlogic: s6: add ao secure nodeXianwei Zhao
2025-11-26arm64: dts: amlogic: Fix the register name of the 'DBI' regionManivannan Sadhasivam
2025-11-26dts: arm64: amlogic: add a5 pinctrl nodeXianwei Zhao
2025-11-26arm64: dts: amlogic: s7d: add power domain controller nodehongyu.chen1
2025-11-26arm64: dts: amlogic: s7: add power domain controller nodehongyu.chen1
2025-11-26arm64: dts: amlogic: s6: add power domain controller nodehongyu.chen1
2025-11-26dts: arm64: amlogic: Add ISP related nodes for C3Keke Li
2025-11-26arm64: dts: meson: add initial device-tree for Tanix TX9 ProChristian Hewitt
2025-11-25KVM: arm64: Convert ICH_HCR_EL2_TDIR cap to EARLY_LOCAL_CPU_FEATUREMarc Zyngier
2025-11-25Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm6...Linus Torvalds
2025-11-25Merge tag 'v6.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kern...Arnd Bergmann
2025-11-25arm64: dts: sprd: sc9860: Simplify clock nodesRob Herring (Arm)
2025-11-24KVM: arm64: GICv2: Always trap GICV_DIR registerMarc Zyngier
2025-11-24KVM: arm64: GICv2: Handle deactivation via GICV_DIR trapsMarc Zyngier
2025-11-24KVM: arm64: GICv2: Handle LR overflow when EOImode==0Marc Zyngier
2025-11-24KVM: arm64: GICv3: Force exit to sync ICH_HCR_EL2.EnMarc Zyngier
2025-11-24KVM: arm64: GICv3: nv: Plug L1 LR sync into deactivation primitiveMarc Zyngier
2025-11-24KVM: arm64: GICv3: nv: Resync LRs/VMCR/HCR early for better MI emulationMarc Zyngier
2025-11-24KVM: arm64: GICv3: Avoid broadcast kick on CPUs lacking TDIRMarc Zyngier
2025-11-24KVM: arm64: GICv3: Handle in-LR deactivation when possibleMarc Zyngier
2025-11-24KVM: arm64: GICv3: Add SPI tracking to handle asymmetric deactivationMarc Zyngier
2025-11-24KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacityMarc Zyngier
2025-11-24KVM: arm64: GICv3: Add GICv2 SGI handling to deactivation primitiveMarc Zyngier
2025-11-24KVM: arm64: GICv3: Handle deactivation via ICV_DIR_EL1 trapsMarc Zyngier
2025-11-24KVM: arm64: GICv3: Handle LR overflow when EOImode==0Marc Zyngier
2025-11-24KVM: arm64: Use MI to detect groups being enabled/disabledMarc Zyngier
2025-11-24KVM: arm64: Move undeliverable interrupts to the end of ap_listMarc Zyngier
2025-11-24KVM: arm64: Invert ap_list sorting to push active interrupts outMarc Zyngier
2025-11-24KVM: arm64: Make vgic_target_oracle() globally availableMarc Zyngier
2025-11-24KVM: arm64: Turn kvm_vgic_vcpu_enable() into kvm_vgic_vcpu_reset()Marc Zyngier
2025-11-24KVM: arm64: Revamp vgic maintenance interrupt configurationMarc Zyngier
2025-11-24KVM: arm64: Eagerly save VMCR on exitMarc Zyngier
2025-11-24KVM: arm64: Compute vgic state irrespective of the number of interruptsMarc Zyngier
2025-11-24KVM: arm64: GICv2: Extract LR computing primitiveMarc Zyngier
2025-11-24KVM: arm64: GICv2: Extract LR folding primitiveMarc Zyngier
2025-11-24KVM: arm64: GICv2: Decouple GICH_HCR programming from LRs being loadedMarc Zyngier
2025-11-24KVM: arm64: GICv2: Preserve EOIcount on exitMarc Zyngier
2025-11-24KVM: arm64: GICv3: Extract LR computing primitiveMarc Zyngier
2025-11-24KVM: arm64: GICv3: Extract LR folding primitiveMarc Zyngier
2025-11-24KVM: arm64: GICv3: Decouple ICH_HCR_EL2 programming from LRsMarc Zyngier
2025-11-24KVM: arm64: GICv3: Preserve EOIcount on exitMarc Zyngier
2025-11-24KVM: arm64: GICv3: Drop LPI active state when folding LRsMarc Zyngier
2025-11-24KVM: arm64: Add LR overflow handling documentationMarc Zyngier
2025-11-24KVM: arm64: Add tracking of vgic_irq being present in a LRMarc Zyngier
2025-11-24KVM: arm64: Repack struct vgic_irq fieldsMarc Zyngier
2025-11-24KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trappingMarc Zyngier
2025-11-24KVM: arm64: vgic-v3: Fix GICv3 trapping in protected modeMarc Zyngier
2025-11-24KVM: arm64: Turn vgic-v3 errata traps into a patched-in constantMarc Zyngier
2025-11-24irqchip/gic: Expose CPU interface VA to KVMMarc Zyngier
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