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| author | Suraj Kandpal <suraj.kandpal@intel.com> | 2023-02-14 10:50:17 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2023-02-14 11:05:38 +0200 |
| commit | f1dc979b6088426698b13e888c65f9c287af48e7 (patch) | |
| tree | e01f2481fe7f2e92d56bc70c887c434c0a2417f5 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 2cfd1b38413c15d1c0af6e24ec3f0af8c36cc27d (diff) | |
| download | kernel-f1dc979b6088426698b13e888c65f9c287af48e7.tar.gz | |
drm/i915/dp: Increase slice_height for DP
According VDSC spec 1.2a Section 3.8 Options for Slice
implies that 108 lines is an optimal slice height, but any
size can be used as long as vertical active
integer multiple and maximum vertical slice count requirements are met.
Bspec: 49259
--v3
-remove previous fallback code and return slice_height as 2 [Jani]
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230214052017.3312044-1-suraj.kandpal@intel.com
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions