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| author | Nagaraju, Vathsala <vathsala.nagaraju@intel.com> | 2016-12-09 23:42:09 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-12-09 16:39:56 -0800 |
| commit | 7e3eb599236db605413b4e047692dab9b600d6c6 (patch) | |
| tree | 3f8bfcec582a91859a9507be1dfb9f29db850c09 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 16d98b31f807756269106f9a71b1a3dc0d19c629 (diff) | |
| download | kernel-7e3eb599236db605413b4e047692dab9b600d6c6.tar.gz | |
drm/i915/psr: report psr2 hw enabled from psr2_ctl
For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
for psr1, bit 31 in SRD_CTL to be set. Reporting
"HW Enabled & Active bit" status for psr2 from SRD_CTL
gives wrong status.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: vathsala nagaraju <vathsala.nagaraju@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481307129-29354-1-git-send-email-vathsala.nagaraju@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions