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authorPeter Wang <peter.wang@mediatek.com>2025-09-24 17:43:25 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2025-10-21 21:36:45 -0400
commit16b42c4281ae536a6ceda97303d9820ac5741293 (patch)
tree23ee37e997195e87b17d4d9a530421357d9ae67d /tools/perf/scripts/python/stackcollapse.py
parent55ce691dc75a356e4b7c552505ce0a427c72f3af (diff)
downloadkernel-16b42c4281ae536a6ceda97303d9820ac5741293.tar.gz
scsi: ufs: host: mediatek: Handle clock scaling for high gear in PM flow
Add clock scaling down for power management flow in the UFS Mediatek driver. If clock scaling is disabled and fixed in high gear, ensure the clock scales down during suspend and scales up again after resume to support high gear. This adjustment maintains proper power management. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Acked-by: Chun-Hung Wu <chun-hung.wu@mediatek.com> Link: https://patch.msgid.link/20250924094527.2992256-4-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
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