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| author | Sean Christopherson <seanjc@google.com> | 2025-06-11 15:45:42 -0700 |
|---|---|---|
| committer | Sean Christopherson <seanjc@google.com> | 2025-06-23 09:50:37 -0700 |
| commit | 3be405e89f3daea23ddfcf6b6526ae44ce38dd9a (patch) | |
| tree | 666be0ca17740842fa096446310dfa1183ed25b8 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | c3d591c91f9c99a35f8cf80d28ea689214a1acf3 (diff) | |
| download | kernel-3be405e89f3daea23ddfcf6b6526ae44ce38dd9a.tar.gz | |
iommu/amd: Document which IRTE fields amd_iommu_update_ga() can modify
Add a comment to amd_iommu_update_ga() to document what fields it can
safely modify without issuing an invalidation of the IRTE, and to explain
its role in keeping GA IRTEs up-to-date.
Per page 93 of the IOMMU spec dated Feb 2025:
When virtual interrupts are enabled by setting MMIO Offset 0018h[GAEn] and
IRTE[GuestMode=1], IRTE[IsRun], IRTE[Destination], and if present IRTE[GATag],
are not cached by the IOMMU. Modifications to these fields do not require an
invalidation of the Interrupt Remapping Table.
Link: https://lore.kernel.org/all/9b7ceea3-8c47-4383-ad9c-1a9bbdc9044a@oracle.com
Cc: Joao Martins <joao.m.martins@oracle.com>
Link: https://lore.kernel.org/r/20250611224604.313496-41-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions