summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/exported-sql-viewer.py
diff options
context:
space:
mode:
authorJingyi Wang <quic_jingyw@quicinc.com>2024-10-18 11:19:32 +0800
committerLinus Walleij <linus.walleij@linaro.org>2024-10-22 14:41:44 +0200
commit0c4cd2cc87c848848c23e0d82e40c4bff8f458c3 (patch)
tree61373bbb5d8af0c13e34a23cb4ac757ce0189208 /tools/perf/scripts/python/exported-sql-viewer.py
parent5778535972e2c1eb69e698803a610b43e50cb036 (diff)
downloadkernel-0c4cd2cc87c848848c23e0d82e40c4bff8f458c3.tar.gz
pinctrl: qcom: add the tlmm driver for QCS8300 platforms
Add support for QCS8300 TLMM configuration and control via the pinctrl framework. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-2-8b8d3957cf1a@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions
88b48db65348d94168c793bdbc8d23c3'>cxl/core: Remove cxld_const_init in cxl_decoder_alloc()Nathan Chancellor 2021-11-15cxl/pmem: Fix module reload vs workqueue stateDan Williams 2021-11-08Merge tag 'cxl-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds 2021-10-29cxl/pci: Add @base to cxl_register_mapDan Williams 2021-09-25cxl/core: Replace unions with struct_group()Kees Cook 2021-09-21cxl/core: Split decoder setup into alloc + addDan Williams 2021-09-21tools/testing/cxl: Introduce a mock memory device + driverDan Williams 2021-09-21cxl/bus: Populate the target list at decoder createDan Williams 2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams 2021-09-21cxl/pmem: Add support for multiple nvdimm-bridge objectsDan Williams 2021-08-06cxl/pci: Simplify register setupBen Widawsky 2021-06-15cxl/pmem: Register 'pmem' / cxl_nvdimm devicesDan Williams 2021-06-15cxl/pmem: Add initial infrastructure for pmem supportDan Williams 2021-06-15cxl/core: Add cxl-bus driver infrastructureDan Williams 2021-06-12cxl/hdm: Fix decoder count calculationBen Widawsky 2021-06-09cxl/acpi: Introduce cxl_decoder objectsDan Williams 2021-06-09cxl/acpi: Add downstream port data to cxl_port instancesDan Williams 2021-06-09cxl/acpi: Introduce the root of a cxl_port topologyDan Williams 2021-06-05cxl/pci: Add HDM decoder capabilitiesBen Widawsky 2021-06-05cxl/pci: Map registers based on capabilitiesIra Weiny 2021-05-14cxl/core: Refactor CXL register lookup for bridge reuseDan Williams 2021-05-14cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devicesDan Williams 2021-05-14cxl/mem: Move some definitions to mem.hDan Williams 2021-02-16cxl/mem: Enable commands via CELBen Widawsky 2021-02-16cxl/mem: Register CXL memX devicesDan Williams 2021-02-16cxl/mem: Find device capabilitiesBen Widawsky