summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/export-to-sqlite.py
diff options
context:
space:
mode:
authorAnton Blanchard <anton@samba.org>2011-09-07 14:41:05 +0000
committerDavid S. Miller <davem@davemloft.net>2011-09-16 15:26:32 -0400
commit91aae1e5c407d4fc79f6983e6c6ba04756c004cb (patch)
tree7511c0564c630554d451599781f4c6ea6f53377f /tools/perf/scripts/python/export-to-sqlite.py
parentb93da27f5234198433345e40b39ff59797bc6f6e (diff)
downloadkernel-91aae1e5c407d4fc79f6983e6c6ba04756c004cb.tar.gz
ibmveth: Checksum offload is always disabled
Commit b9367bf3ee6d (net: ibmveth: convert to hw_features) reversed a check in ibmveth_set_csum_offload that results in checksum offload never being enabled. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: <stable@kernel.org> # 3.0+ Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions
a href='/distro/kernel/commit/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi?h=linux-6.6.y&id=70347888dca1978cd52c322fc5ce778c9825966c'>arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8KGregory CLEMENT 2016-10-21arm64: dts: marvell: add TRNG description for Armada 8K CPRomain Perier 2016-10-17Merge tag 'mvebu-fixes-4.8-3' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson 2016-09-20arm64: dts: marvell: fix clocksource for CP110 master SPI0Marcin Wojtas 2016-09-14arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8KThomas Petazzoni 2016-06-30arm64: dts: marvell: add XOR engine description for Armada 7K/8K CPThomas Petazzoni 2016-04-26arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 masterThomas Petazzoni