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authorMarc Zyngier <maz@kernel.org>2020-03-04 20:33:27 +0000
committerMarc Zyngier <maz@kernel.org>2020-03-24 12:15:51 +0000
commit2291ff2f2a569b7b7a64aff3d05e1d51fe0fd66a (patch)
treebc385917daa149636491ab6e79af965429af49df /tools/perf/scripts/python/event_analyzing_sample.py
parentbacf2c60548befa8a31c2f19ef65bf2177fda33f (diff)
downloadkernel-2291ff2f2a569b7b7a64aff3d05e1d51fe0fd66a.tar.gz
KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor
The GICv4.1 architecture gives the hypervisor the option to let the guest choose whether it wants the good old SGIs with an active state, or the new, HW-based ones that do not have one. For this, plumb the configuration of SGIs into the GICv3 MMIO handling, present the GICD_TYPER2.nASSGIcap to the guest, and handle the GICD_CTLR.nASSGIreq setting. In order to be able to deal with the restore of a guest, also apply the GICD_CTLR.nASSGIreq setting at first run so that we can move the restored SGIs to the HW if that's what the guest had selected in a previous life. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Link: https://lore.kernel.org/r/20200304203330.4967-21-maz@kernel.org
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions
afb0fbbc04117ff7c900a83'>drm/xe/bmg: Add new PCI IDsShekhar Chauhan 2025-01-16drm/i915/display: Add MTL subplatforms definitionDnyaneshwar Bhadane 2025-01-13Merge tag 'drm-xe-next-2025-01-10' of https://gitlab.freedesktop.org/drm/xe/k...Dave Airlie 2025-01-10drm/xe: remove unused xe_pciids.h harder, add missing PCI IDJani Nikula 2024-12-11drm/intel/pciids: Refactor DG2 PCI IDs into segment rangesRaag Jadav 2024-11-21Merge tag 'drm-next-2024-11-21' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds 2024-11-05drm/i915/gsc: ARL-H and ARL-U need a newer GSC FW.Daniele Ceraolo Spurio 2024-10-29drm/intel/pciids: rename i915_pciids.h to just pciids.hJani Nikula