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authorChris Wilson <chris@chris-wilson.co.uk>2017-02-13 17:15:32 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2017-02-13 20:45:45 +0000
commit170594502cf591fd0789d7e5239937b1a87af4c6 (patch)
tree77757a21dd505037cace248c180f0d79f7c09d00 /tools/perf/scripts/python/bin
parent3d81d589d6e3c89b687771074f65cb8f3b59ccf3 (diff)
downloadkernel-170594502cf591fd0789d7e5239937b1a87af4c6.tar.gz
drm/i915: Test coherency of and barriers between cache domains
Write into an object using WB, WC, GTT, and GPU paths and make sure that our internal API is sufficient to ensure coherent reads and writes. v2: Avoid invalid free upon allocation error Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170213171558.20942-21-chris@chris-wilson.co.uk
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