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| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2018-04-14 07:57:20 -0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2018-04-20 10:19:05 -0400 |
| commit | 23fd542e6305f9f3d9b651a46a07c1d3b4c8871a (patch) | |
| tree | 327061e7b0c9a54ed14aa2ff75e0b506d858b5e8 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | e806e328c8ca6d71806e517e6134590404817eaa (diff) | |
| download | kernel-23fd542e6305f9f3d9b651a46a07c1d3b4c8871a.tar.gz | |
media: rcar-vin: add chsel information to rvin_info
Each Gen3 SoC has a limited set of predefined routing possibilities for
which CSI-2 device and channel can be routed to which VIN instance.
Prepare to store this information in the struct rvin_info.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions