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authorBen Hutchings <ben@decadent.org.uk>2020-06-11 19:06:00 +0100
committerBen Hutchings <ben@decadent.org.uk>2020-06-11 19:06:00 +0100
commit16f3f0d74b2069038a24f69952f0c19ad7c48d9a (patch)
treeaeed50cdfaf3e659c9eb81dd9821bbecb2343dd3 /include/linux/amigaffs.h
parentd03daec2e50aa2a0b6de2c3572af5e1d61f9d132 (diff)
downloadkernel-linux-3.16.y.tar.gz
Linux 3.16.85linux-3.16.y
Diffstat (limited to 'include/linux/amigaffs.h')
0 files changed, 0 insertions, 0 deletions
com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-20drm/amd/display: Fix dig register undefinedDuncan Ma [Why] Some of the stream encoder registers have register offset address 0. It is causing no display in some scenarios due to DIG_FE was not setup correctly and was not enabled. [How] Fix stream encoder register define list. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Duncan Ma <duncan.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-20drm/amd/display: Temporarily disable clock gatingCharlene Liu Temporarily disable dchubbub clock gating, registers: .DISPCLK_R_DCHUBBUB_GATE_DIS .DCFCLK_R_DCHUBBUB_GATE_DIS need to follow up with sequence issue. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Leo Chen <sanchuan.chen@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-20drm/amd/display: disable clock gating logicMuhammad Ahmed Disable clock gating logic. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-20drm/amd/display: Add reset for SYMCLKC_FE_SRC_SELTaimur Hassan To prevent confusion after symclk has already been disabled. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-11drm/amd/display: Drop unused registersQingqing Zhuo [Why & How] Some registers are never used in the driver but defined. Remove them. Reviewed-by: Roman Li <roman.li@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-06drm/amd/display: clean up some inconsistent indentingsYang Li drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_hwseq.c:159 dcn35_init_hw() warn: inconsistent indentig Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-06drm/amd/display: clean up one inconsistent indentingYang Li drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_resource.c:1877 dcn35_resource_construct() warn: inconsistent indenting Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-06drm/amd/display: Remove duplicated include in dcn35_hwseq.cYang Li ./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hwseq.c: clk_mgr.h is included more than once. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-06drm/amd/display: Remove duplicated include in dcn35_optc.cYang Li ./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_optc.c: dcn35_optc.h is included more than once. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-09-06drm/amd/display: Remove duplicated include in dcn35_resource.cYang Li ./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c: dcn31/dcn31_dio_link_encoder.h is included more than once. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Adjust kdoc for 'optc35_set_odm_combine'Srinivasan Shanmugam Fixes the following W=1 kernel build warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_optc.c:46: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Enable CRTC Cc: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 ResourceQingqing Zhuo [Why & How] Add resource handling for DCN35. v2: drop unused guard v3: drop dml2 dependencies for now (Alex) Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 initQingqing Zhuo [Why & How] Add init files for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 HWSEQQingqing Zhuo [Why & How] Add HWSEQ handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 DSCQingqing Zhuo [Why & How] Add DSC handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 MMHUBBUBQingqing Zhuo [Why & How] Add MMHUBBUB handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 HUBBUBQingqing Zhuo [Why & How] Add HUBBUB handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 HUBPQingqing Zhuo [Why & How] Add HUBP handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 DWBQingqing Zhuo [Why & How] Add DWB handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 DPPQingqing Zhuo [Why & How] Add DPP handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 OPPQingqing Zhuo [Why & How] Add OPP handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 OPTCQingqing Zhuo [Why & How] Add OPTC handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 PG_CNTLQingqing Zhuo [Why & How] Add PG_CNTL handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 DIOQingqing Zhuo [Why & How] Add DIO handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2023-08-30drm/amd/display: Add DCN35 DCCGQingqing Zhuo [Why & How] Add DCCG handling for DCN35. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>