diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-04-27 15:32:53 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:32:21 -0500 |
| commit | 3512a78a3cefcd9ec0177771f637de0fe4a64ea2 (patch) | |
| tree | 274f4114180aff907326184909eca50803f48563 /drivers/gpu/drm/xe/xe_pcode_api.h | |
| parent | 36e22be498fb8361ef411ac7d8cf9404338f6fc2 (diff) | |
drm/xe: Use XE_REG/XE_REG_MCR
These should replace the _MMIO() and MCR_REG() from i915, with the goal
of being more extensible, allowing to pass the additional fields for
struct xe_reg and struct xe_reg_mcr. Replace all uses of _MMIO() and
MCR_REG() in xe.
Since the RTP, reg-save-restore and WA infra are not ready to use the
new type, just undef the macro like was done for the i915 types
previously. That conversion will come later.
v2: Remove MEDIA_SOFT_SCRATCH_COUNT/MEDIA_SOFT_SCRATCH re-added by
mistake (Matt Roper)
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230427223256.1432787-8-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_pcode_api.h')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pcode_api.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h index 4e689cd4b23b..837ff7c71280 100644 --- a/drivers/gpu/drm/xe/xe_pcode_api.h +++ b/drivers/gpu/drm/xe/xe_pcode_api.h @@ -7,7 +7,7 @@ #include "regs/xe_reg_defs.h" -#define PCODE_MAILBOX _MMIO(0x138124) +#define PCODE_MAILBOX XE_REG(0x138124) #define PCODE_READY REG_BIT(31) #define PCODE_MB_PARAM2 REG_GENMASK(23, 16) #define PCODE_MB_PARAM1 REG_GENMASK(15, 8) @@ -22,8 +22,8 @@ #define PCODE_GT_RATIO_OUT_OF_RANGE 0x10 #define PCODE_REJECTED 0x11 -#define PCODE_DATA0 _MMIO(0x138128) -#define PCODE_DATA1 _MMIO(0x13812C) +#define PCODE_DATA0 XE_REG(0x138128) +#define PCODE_DATA1 XE_REG(0x13812C) /* Min Freq QOS Table */ #define PCODE_WRITE_MIN_FREQ_TABLE 0x8 |