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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2025-11-20 16:29:23 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-02-26 15:00:44 -0800
commit14aa447e4fa101419047e18a291b4a9c82fa38b2 (patch)
treed284b9dd38eecd3d6418dd6e02654b5acd37e4e1 /drivers/crypto
parent7d1096483bef404e7ac8806fa9ef2f7c91ac57e6 (diff)
crypto: qat - fix parameter order used in ICP_QAT_FW_COMN_FLAGS_BUILD
[ Upstream commit e3d036fecd6f89d4d262034de7bef8d6e49b661b ] The macro ICP_QAT_FW_COMN_FLAGS_BUILD sets flags in the firmware descriptor to indicate: * Whether the content descriptor is a pointer or contains embedded data. * Whether the source and destination buffers are scatter-gather lists or flat buffers. The correct parameter order is: * First: content descriptor type * Second: source/destination pointer type In the asymmetric crypto code, the macro was used with the parameters swapped. Although this does not cause functional issues, since both macros currently evaluate to 0, it is incorrect. Fix the parameter order in the Diffie-Hellman and RSA code paths. Fixes: a990532023b9 ("crypto: qat - Add support for RSA algorithm") Fixes: c9839143ebbf ("crypto: qat - Add DH support") Reported-by: Qihua Dai <qihua.dai@intel.com> # off-list Reviewed-by: Ahsan Atta <ahsan.atta@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/intel/qat/qat_common/qat_asym_algs.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c b/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c
index 85c682e248fb..e09b9edfce42 100644
--- a/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c
+++ b/drivers/crypto/intel/qat/qat_common/qat_asym_algs.c
@@ -255,8 +255,8 @@ static int qat_dh_compute_value(struct kpp_request *req)
qat_req->areq.dh = req;
msg->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
msg->pke_hdr.comn_req_flags =
- ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_PTR_TYPE_FLAT,
- QAT_COMN_CD_FLD_TYPE_64BIT_ADR);
+ ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_64BIT_ADR,
+ QAT_COMN_PTR_TYPE_FLAT);
/*
* If no source is provided use g as base
@@ -731,8 +731,8 @@ static int qat_rsa_enc(struct akcipher_request *req)
qat_req->areq.rsa = req;
msg->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
msg->pke_hdr.comn_req_flags =
- ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_PTR_TYPE_FLAT,
- QAT_COMN_CD_FLD_TYPE_64BIT_ADR);
+ ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_64BIT_ADR,
+ QAT_COMN_PTR_TYPE_FLAT);
qat_req->in.rsa.enc.e = ctx->dma_e;
qat_req->in.rsa.enc.n = ctx->dma_n;
@@ -867,8 +867,8 @@ static int qat_rsa_dec(struct akcipher_request *req)
qat_req->areq.rsa = req;
msg->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
msg->pke_hdr.comn_req_flags =
- ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_PTR_TYPE_FLAT,
- QAT_COMN_CD_FLD_TYPE_64BIT_ADR);
+ ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_64BIT_ADR,
+ QAT_COMN_PTR_TYPE_FLAT);
if (ctx->crt_mode) {
qat_req->in.rsa.dec_crt.p = ctx->dma_p;