diff options
| author | Guodong Xu <guodong@riscstar.com> | 2026-01-15 07:18:57 +0800 |
|---|---|---|
| committer | Paul Walmsley <pjw@kernel.org> | 2026-01-14 17:16:23 -0700 |
| commit | 69132c2d4c11858fa43edeb19a911eab625567f9 (patch) | |
| tree | 34452c2b28bd832f31518f29e872f579d52945aa /Documentation/arch | |
| parent | 0f61b1860cc3f52aef9036d7235ed1f017632193 (diff) | |
Documentation: riscv: uabi: Clarify ISA spec version for canonical order
Specify that chapter 27 refers to version 20191213 of the RISC-V ISA
Unprivileged Architecture. The chapter numbering differs across
specification versions - for example, in version 20250508, the ISA
Extension Naming Conventions is chapter 36, not chapter 27.
Historical versions of the RISC-V specification can be found via Link [1].
Acked-by: Paul Walmsley <pjw@kernel.org>
Link: https://riscv.org/specifications/ratified/ [1]
Fixes: f07b2b3f9d47 ("Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo")
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://patch.msgid.link/20260115-adding-b-dtsi-v2-1-254dd61cf947@riscstar.com
Diffstat (limited to 'Documentation/arch')
| -rw-r--r-- | Documentation/arch/riscv/uabi.rst | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/arch/riscv/uabi.rst b/Documentation/arch/riscv/uabi.rst index 243e40062e34..0c5299e00762 100644 --- a/Documentation/arch/riscv/uabi.rst +++ b/Documentation/arch/riscv/uabi.rst @@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo ------------------------------------ The canonical order of ISA extension names in the ISA string is defined in -chapter 27 of the unprivileged specification. +Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA +(Document Version 20191213). + The specification uses vague wording, such as should, when it comes to ordering, so for our purposes the following rules apply: |