diff options
| author | Clément Léger <cleger@rivosinc.com> | 2024-02-21 09:31:06 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-04-28 14:50:38 -0700 |
| commit | 63f93a3ca891fd90353cf81f5d2fc4cbc3508f1a (patch) | |
| tree | 0ac58a9ea623c45db680fde97a110db564fe308f /Documentation/arch/riscv | |
| parent | 441381506ba7ca1cb8b44e651b130ab791d2e298 (diff) | |
riscv: hwprobe: export Zihintpause ISA extension
Export the Zihintpause ISA extension through hwprobe which allows using
"pause" instructions. Some userspace applications (OpenJDK for
instance) uses this to handle some locking back-off.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240221083108.1235311-1-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'Documentation/arch/riscv')
| -rw-r--r-- | Documentation/arch/riscv/hwprobe.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index b2bcc9eed9aa..204cd4433af5 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -188,6 +188,10 @@ The following keys are defined: manual starting from commit 95cf1f9 ("Add changes requested by Ved during signoff") + * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTPAUSE`: The Zihintpause extension is + supported as defined in the RISC-V ISA manual starting from commit + d8ab5c78c207 ("Zihintpause is ratified"). + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. |