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authorLinus Walleij <linusw@kernel.org>2026-04-07 08:52:53 +0200
committerLinus Walleij <linusw@kernel.org>2026-04-07 08:52:53 +0200
commit01c3ec507a33f30cf0992f86282d90ce9b7715c9 (patch)
treeeb88cead14dceea74e2d9c8e1b4791a9b8f425e1
parent7aaa8047eafd0bd628065b15757d9b48c5f9c07d (diff)
parent1ca468e78ea97c3365befdd408f71bda4b295134 (diff)
Merge tag 'intel-pinctrl-v7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes
intel-pinctrl for v7.0-2 * Fix 1kOhm, debounce, and PWM capability support * Add support for new PAD_OWN layout Signed-off-by: Linus Walleij <linusw@kernel.org>
-rw-r--r--drivers/pinctrl/intel/pinctrl-intel.c36
-rw-r--r--drivers/pinctrl/intel/pinctrl-intel.h1
2 files changed, 27 insertions, 10 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 9d32bb8bc13a..97bf5ec78db4 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -53,8 +53,6 @@
#define PADOWN_MASK(p) (GENMASK(3, 0) << PADOWN_SHIFT(p))
#define PADOWN_GPP(p) ((p) / 8)
-#define PWMC 0x204
-
/* Offset from pad_regs */
#define PADCFG0 0x000
#define PADCFG0_RXEVCFG_MASK GENMASK(26, 25)
@@ -205,19 +203,25 @@ static bool intel_pad_owned_by_host(const struct intel_pinctrl *pctrl, unsigned
community = intel_get_community(pctrl, pin);
if (!community)
return false;
- if (!community->padown_offset)
+
+ /* If padown_offset is not provided, assume host ownership */
+ padown = community->regs + community->padown_offset;
+ if (padown == community->regs)
return true;
+ /* New HW generations have extended PAD_OWN registers */
+ if (community->features & PINCTRL_FEATURE_3BIT_PAD_OWN)
+ return !(readl(padown + pin_to_padno(community, pin) * 4) & 7);
+
padgrp = intel_community_get_padgroup(community, pin);
if (!padgrp)
return false;
gpp_offset = padgroup_offset(padgrp, pin);
gpp = PADOWN_GPP(gpp_offset);
- offset = community->padown_offset + padgrp->padown_num * 4 + gpp * 4;
- padown = community->regs + offset;
+ offset = padgrp->padown_num * 4 + gpp * 4;
- return !(readl(padown) & PADOWN_MASK(gpp_offset));
+ return !(readl(padown + offset) & PADOWN_MASK(gpp_offset));
}
static bool intel_pad_acpi_mode(const struct intel_pinctrl *pctrl, unsigned int pin)
@@ -1549,8 +1553,10 @@ static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
}
static int intel_pinctrl_probe_pwm(struct intel_pinctrl *pctrl,
- struct intel_community *community)
+ struct intel_community *community,
+ unsigned short capability_offset)
{
+ void __iomem *base = community->regs + capability_offset + 4;
static const struct pwm_lpss_boardinfo info = {
.clk_rate = 19200000,
.npwm = 1,
@@ -1564,7 +1570,7 @@ static int intel_pinctrl_probe_pwm(struct intel_pinctrl *pctrl,
if (!IS_REACHABLE(CONFIG_PWM_LPSS))
return 0;
- chip = devm_pwm_lpss_probe(pctrl->dev, community->regs + PWMC, &info);
+ chip = devm_pwm_lpss_probe(pctrl->dev, base, &info);
return PTR_ERR_OR_ZERO(chip);
}
@@ -1595,7 +1601,9 @@ int intel_pinctrl_probe(struct platform_device *pdev,
for (i = 0; i < pctrl->ncommunities; i++) {
struct intel_community *community = &pctrl->communities[i];
+ unsigned short capability_offset[6];
void __iomem *regs;
+ u32 revision;
u32 offset;
u32 value;
@@ -1610,10 +1618,14 @@ int intel_pinctrl_probe(struct platform_device *pdev,
value = readl(regs + REVID);
if (value == ~0u)
return -ENODEV;
- if (((value & REVID_MASK) >> REVID_SHIFT) >= 0x94) {
+
+ revision = (value & REVID_MASK) >> REVID_SHIFT;
+ if (revision >= 0x092) {
community->features |= PINCTRL_FEATURE_DEBOUNCE;
community->features |= PINCTRL_FEATURE_1K_PD;
}
+ if (revision >= 0x110)
+ community->features |= PINCTRL_FEATURE_3BIT_PAD_OWN;
/* Determine community features based on the capabilities */
offset = CAPLIST;
@@ -1622,15 +1634,19 @@ int intel_pinctrl_probe(struct platform_device *pdev,
switch ((value & CAPLIST_ID_MASK) >> CAPLIST_ID_SHIFT) {
case CAPLIST_ID_GPIO_HW_INFO:
community->features |= PINCTRL_FEATURE_GPIO_HW_INFO;
+ capability_offset[CAPLIST_ID_GPIO_HW_INFO] = offset;
break;
case CAPLIST_ID_PWM:
community->features |= PINCTRL_FEATURE_PWM;
+ capability_offset[CAPLIST_ID_PWM] = offset;
break;
case CAPLIST_ID_BLINK:
community->features |= PINCTRL_FEATURE_BLINK;
+ capability_offset[CAPLIST_ID_BLINK] = offset;
break;
case CAPLIST_ID_EXP:
community->features |= PINCTRL_FEATURE_EXP;
+ capability_offset[CAPLIST_ID_EXP] = offset;
break;
default:
break;
@@ -1653,7 +1669,7 @@ int intel_pinctrl_probe(struct platform_device *pdev,
if (ret)
return ret;
- ret = intel_pinctrl_probe_pwm(pctrl, community);
+ ret = intel_pinctrl_probe_pwm(pctrl, community, capability_offset[CAPLIST_ID_PWM]);
if (ret)
return ret;
}
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index 2f37109d5860..b5476b9de0db 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -150,6 +150,7 @@ struct intel_community {
#define PINCTRL_FEATURE_PWM BIT(3)
#define PINCTRL_FEATURE_BLINK BIT(4)
#define PINCTRL_FEATURE_EXP BIT(5)
+#define PINCTRL_FEATURE_3BIT_PAD_OWN BIT(6)
#define __INTEL_COMMUNITY(b, s, e, g, n, gs, gn, soc) \
{ \