This is mostly a learning project for me. I am learning about the internals of a CPU and how it encodes/decodes instructions to produce the intended results.

As of now, there are limitied features, and supported instructions are limited.

See; https://0xinfinity.dev/specs/emulator for an exhaustive list of supported instructions and specific opcodes.

Planned emulator features

SIB Byte Support for existing and future instructions.
Execution Lock and Permission system for RAM.
Branch Prediction and Speculative Execution //Long-term plan
SIMD flattening (optional) and AV redirection (optional).
Buffer overflow prediction, detection, and reporting.

Planned architectural features

Better logging system
Comprehensive unit tests for each instruction.

Planned instructions

TBD

Requirements

gcc Rest; TBD