# SPDX-License-Identifier: GPL-2.0
# Makefile for the Linux graphics to console drivers.
# 5 Aug 1999, James Simmons, <mailto:jsimmons@users.sf.net>
# Rewritten to use lists instead of if-statements.

obj-$(CONFIG_DUMMY_CONSOLE)       += dummycon.o
obj-$(CONFIG_SGI_NEWPORT_CONSOLE) += newport_con.o
obj-$(CONFIG_STI_CONSOLE)         += sticon.o
obj-$(CONFIG_VGA_CONSOLE)         += vgacon.o
obj-$(CONFIG_MDA_CONSOLE)         += mdacon.o
hor>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-08-13T08:39:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e098bc9612c2b60f94920461d71c92962a916e73'/>
<id>urn:sha1:e098bc9612c2b60f94920461d71c92962a916e73</id>
<content type='text'>
The target is to provide a clear entry point(for power routines).
Also this can help to maintain a clear view about the frameworks
used on different ASICs. Hopefully all these can make power part
more friendly to play with.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/si/dpm: fix phase shedding setup</title>
<updated>2016-09-28T20:13:17Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-09-27T18:57:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bdbdb571c807b927867bd391159c9872a952533f'/>
<id>urn:sha1:bdbdb571c807b927867bd391159c9872a952533f</id>
<content type='text'>
Used the wrong index to setup the phase shedding mask.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/si/dpm: fix symbol conflicts with radeon</title>
<updated>2016-09-14T19:10:40Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-09-13T04:06:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6861c837e28e1b1300a1b24ddab748c8ee50da3b'/>
<id>urn:sha1:6861c837e28e1b1300a1b24ddab748c8ee50da3b</id>
<content type='text'>
Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Tidy up SI SMC code (v2)</title>
<updated>2016-09-14T13:43:39Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2016-09-06T15:56:42Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f80c738c614e4410c3c343141c0edabfea421862'/>
<id>urn:sha1:f80c738c614e4410c3c343141c0edabfea421862</id>
<content type='text'>
As well as merge SMC clock functions into one to reduce LOC.

v2: Fix swapped ck enable bit
bug: https://bugs.freedesktop.org/show_bug.cgi?id=97801

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add SI SMC support</title>
<updated>2016-08-31T19:21:08Z</updated>
<author>
<name>Maruthi Srinivas Bayyavarapu</name>
<email>Maruthi.Bayyavarapu@amd.com</email>
</author>
<published>2016-04-26T15:01:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0c34f45368422dc34545a56a60f3884ffc3a4a3b'/>
<id>urn:sha1:0c34f45368422dc34545a56a60f3884ffc3a4a3b</id>
<content type='text'>
Signed-off-by: Maruthi Bayyavarapu &lt;maruthi.bayyavarapu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>