>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2019-03-21T11:08:26Z</updated>
<entry>
<title>irqchip/mbigen: Don't clear eventid when freeing an MSI</title>
<updated>2019-03-21T11:08:26Z</updated>
<author>
<name>Jianguo Chen</name>
<email>chenjianguo3@huawei.com</email>
</author>
<published>2019-03-20T18:54:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fca269f201a8d9985c0a31fb60b15d4eb57cef80'/>
<id>urn:sha1:fca269f201a8d9985c0a31fb60b15d4eb57cef80</id>
<content type='text'>
mbigen_write_msg clears eventid bits of a mbigen register
when free a interrupt, because msi_domain_deactivate memset
struct msg to zero. Then multiple mbigen pins with zero eventid
will report the same interrupt number.

The eventid clear call trace:
                free_irq
                __free_irq
                irq_shutdown
                irq_domain_deactivate_irq
                __irq_domain_deactivate_irq
                __irq_domain_deactivate_irq
                msi_domain_deactivate
                platform_msi_write_msg
                mbigen_write_msg

Signed-off-by: Jianguo Chen &lt;chenjianguo3@huawei.com&gt;
[maz: massaged subject]
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip/irq-mbigen: Constify irq_domain_ops</title>
<updated>2017-06-22T13:13:00Z</updated>
<author>
<name>Tobias Klauser</name>
<email>tklauser@distanz.ch</email>
</author>
<published>2017-06-02T08:20:55Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e183c2a3ea1996932fef7d5867df387793b1941f'/>
<id>urn:sha1:e183c2a3ea1996932fef7d5867df387793b1941f</id>
<content type='text'>
struct irq_domain_ops is not modified, so it can be made const.

Signed-off-by: Tobias Klauser &lt;tklauser@distanz.ch&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip/mbigen: Fix the clear register offset calculation</title>
<updated>2017-05-12T08:25:38Z</updated>
<author>
<name>MaJun</name>
<email>majun258@huawei.com</email>
</author>
<published>2017-05-12T03:55:28Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9459a04b6a5a09967eec94a1b66f0a74312819d9'/>
<id>urn:sha1:9459a04b6a5a09967eec94a1b66f0a74312819d9</id>
<content type='text'>
The register array offset for clearing an interrupt is calculated by:

    offset = (hwirq - RESERVED_IRQ_PER_MBIGEN_CHIP) / 32;

This is wrong because the clear register array includes the reserved
interrupts. So the clear operation ends up in the wrong register.

This went unnoticed so far, because the hardware clears the real bit
through a timeout mechanism when the hardware is configured in debug
mode. That debug mode was enabled on early generations of the hardware, so
the problem was papered over.

On newer hardware with updated firmware the debug mode was disabled, so the
bits did not get cleared which causes the system to malfunction.

Remove the subtraction of RESERVED_IRQ_PER_MBIGEN_CHIP, so the correct
register is accessed.

[ tglx: Rewrote changelog ]

Fixes: a6c2f87b8820 ("irqchip/mbigen: Implement the mbigen irq chip operation functions")
Signed-off-by: MaJun &lt;majun258@huawei.com&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Cc: linuxarm@huawei.com
Cc: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Link: http://lkml.kernel.org/r/1494561328-39514-4-git-send-email-guohanjun@huawei.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>irqchip/mbigen: Fix potential NULL dereferencing</title>
<updated>2017-05-12T08:25:37Z</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2017-05-12T03:55:27Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ad7cc3c0c57d77b442db323056354d0e49833569'/>
<id>urn:sha1:ad7cc3c0c57d77b442db323056354d0e49833569</id>
<content type='text'>
platform_get_resource() may return NULL, add proper
check to avoid potential NULL dereferencing.

Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Cc: linuxarm@huawei.com
Cc: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Cc: MaJun &lt;majun258@huawei.com&gt;
Link: http://lkml.kernel.org/r/1494561328-39514-3-git-send-email-guohanjun@huawei.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>irqchip/mbigen: Fix memory mapping code</title>
<updated>2017-05-12T08:25:37Z</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2017-05-12T03:55:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5ba9b0a14132d0b8d97affe909f324045a968d03'/>
<id>urn:sha1:5ba9b0a14132d0b8d97affe909f324045a968d03</id>
<content type='text'>
Some mbigens share memory regions, and devm_ioremap_resource
does not allow to share resources which will break the probe
of mbigen, in opposition to devm_ioremap.

This patch restores back usage of devm_ioremap function, but
with proper error handling and logging.

Fixes: 216646e4d82e ("irqchip/mbigen: Fix return value check in mbigen_device_probe()")
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Cc: linuxarm@huawei.com
Cc: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Cc: MaJun &lt;majun258@huawei.com&gt;
Link: http://lkml.kernel.org/r/1494561328-39514-2-git-send-email-guohanjun@huawei.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>irqchip/mbigen: Fix return value check in mbigen_device_probe()</title>
<updated>2017-04-30T09:21:16Z</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2017-04-27T15:21:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=216646e4d82e847791f0ba66c439dedd36cb119f'/>
<id>urn:sha1:216646e4d82e847791f0ba66c439dedd36cb119f</id>
<content type='text'>
In case of error, the function devm_ioremap() returns NULL pointer
not ERR_PTR(). Use devm_ioremap_resource() instead of devm_ioremap()
to fix the IS_ERR() test issue.

Fixes: 76e1f77f9c26 ("irqchip/mbigen: Introduce mbigen_of_create_domain()")
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Link: http://lkml.kernel.org/r/20170427152113.31147-1-weiyj.lk@gmail.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
</entry>
<entry>
<title>irqchip/mbigen: Add ACPI support</title>
<updated>2017-04-07T09:52:20Z</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2017-03-28T12:21:05Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f907c515ffb06e6fd5e74397badd674f3c233418'/>
<id>urn:sha1:f907c515ffb06e6fd5e74397badd674f3c233418</id>
<content type='text'>
With the preparation of platform msi support and interrupt producer
in commit d44fa3d46079 ("ACPI: Add support for ResourceSource/IRQ
domain mapping"), we can add mbigen ACPI support now.

Now that the major framework changes are ready, we just need to add
the ACPI probe code which creates the irqdomain for devices connecting
to it.

In order to create the irqdomain, we need to know the number of hw
irqs as input which is provided by mbigen. In DT case, we are using
"num-pins" property to describe it, and we will take advantage of
that too using _DSD in ACPI as there is no standard way of describe
it in ACPI way, also according to the _DSD rule described in
Documentation/acpi/DSD-properties-rules.txt, it doesn't break
the rules.

The DSDT is represented as below:

For mbigen,
  Device(MBI0) {
          Name(_HID, "HISI0152")
          Name(_UID, Zero)
          Name(_CRS, ResourceTemplate() {
                  Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
          })

         Name(_DSD, Package () {
                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
                 Package () {
                         Package () {"num-pins", 378}
                 }
        })
 }

For devices,
 Device(SAS0) {
         Name(_HID, "HISIxxxx")
         Name(_UID, Zero)
         Name(_CRS, ResourceTemplate() {
                 Memory32Fixed(ReadWrite, 0xb0030000, 0x10000)
		 Interrupt(ResourceConsumer,..., "\_SB.MBI0") {12, ...}
         })
 }

So for the devices connected to the mbigen, as we clearly say that
it refers to a specific interrupt controller (mbigen), we can get
the virq from mbigen's irqdomain once it's created successfully.

Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: MaJun &lt;majun258@huawei.com&gt;
Cc: Al Stone &lt;ahs3@redhat.com&gt;
Cc: Darren Hart &lt;dvhart@infradead.org&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip/mbigen: Introduce mbigen_of_create_domain()</title>
<updated>2017-04-07T09:52:20Z</updated>
<author>
<name>Kefeng Wang</name>
<email>wangkefeng.wang@huawei.com</email>
</author>
<published>2017-03-07T12:40:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=76e1f77f9c26ec96ce58f46cc74ad07c731bd7ba'/>
<id>urn:sha1:76e1f77f9c26ec96ce58f46cc74ad07c731bd7ba</id>
<content type='text'>
Introduce mbigen_of_create_domain() to consolidate OF related
code and prepare for ACPI later, no funtional change.

Signed-off-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Reviewed-by: Ma Jun &lt;majun258@huawei.com&gt;
Tested-by: Ming Lei &lt;ming.lei@canonical.com&gt;
Tested-by: Wei Xu &lt;xuwei5@hisilicon.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip/mbigen: Drop module owner</title>
<updated>2017-04-07T09:52:20Z</updated>
<author>
<name>Kefeng Wang</name>
<email>wangkefeng.wang@huawei.com</email>
</author>
<published>2017-03-07T12:40:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2911c6d961b35fceaf1fdede3c55e11dc3423be1'/>
<id>urn:sha1:2911c6d961b35fceaf1fdede3c55e11dc3423be1</id>
<content type='text'>
Module owner will be set by driver core, so drop it.

Signed-off-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Reviewed-by: Ma Jun &lt;majun258@huawei.com&gt;
Tested-by: Ming Lei &lt;ming.lei@canonical.com&gt;
Tested-by: Wei Xu &lt;xuwei5@hisilicon.com&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>