e.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2018-09-04T21:37:38Z</updated>
<entry>
<title>mtd: rawnand: fsl_ifc: fixup SRAM init for newer ctrl versions</title>
<updated>2018-09-04T21:37:38Z</updated>
<author>
<name>Kurt Kanzenbach</name>
<email>kurt@linutronix.de</email>
</author>
<published>2018-08-13T07:18:46Z</published>
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<id>urn:sha1:ff8648f29fe58c2d94d32a076d2de7b92be4b485</id>
<content type='text'>
Newer versions of the IFC controller use a different method of initializing the
internal SRAM: Instead of reading from flash, a bit in the NAND configuration
register has to be set in order to trigger the self-initializing process.

Signed-off-by: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: fsl_ifc: Read ECCSTAT0 and ECCSTAT1 registers for IFC 2.0</title>
<updated>2018-03-21T09:22:28Z</updated>
<author>
<name>Jagdish Gediya</name>
<email>jagdish.gediya@nxp.com</email>
</author>
<published>2018-03-21T19:38:10Z</published>
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<content type='text'>
Due to missing information in Hardware manual, current
implementation doesn't read ECCSTAT0 and ECCSTAT1 registers
for IFC 2.0.

Add support to read ECCSTAT0 and ECCSTAT1 registers during
ecccheck for IFC 2.0.

Fixes: 656441478ed5 ("mtd: nand: ifc: Fix location of eccstat registers for IFC V1.0")
Cc: stable@vger.kernel.org # v3.18+
Signed-off-by: Jagdish Gediya &lt;jagdish.gediya@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
</content>
</entry>