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2023-08-13dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRCOtto Pflüger
Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of GPLL0_EARLY. Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230802170317.205112-2-otto.pflueger@abscue.de Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCsImran Shaik
Add support for GCC_GPLL1_OUT_EVEN and GCC_DDRSS_ECPRI_GSI_CLK clock bindings for QDU1000 and QRU1000 SoCs. While at it, update the maintainers list. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230803105741.2292309-2-quic_imrashai@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into ↵Bjorn Andersson
arm64-for-6.6 Merge additional MSM8998 GCC DeviceTree binding constants for use in the MSM8998 DeviceTree source.
2023-08-13Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into ↵Bjorn Andersson
clk-for-6.6 Merge additional MSM8998 GCC DeviceTree binding constants through a topic branch to make them available to the DeviceTree source tree as well.
2023-08-13dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legsKonrad Dybcio
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11dt-bindings: firmware: qcom: scm: Updating VMID listGokul krishna Krishnakumar
Adding the full list of VMID's, which are used by different clients to pass to the secure world. Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230403204455.6758-1-quic_gokukris@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' ↵Bjorn Andersson
into arm64-for-6.6 Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines.
2023-08-11Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' ↵Bjorn Andersson
into clk-for-6.6 Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines.
2023-08-11dt-bindings: clock: Add IPQ5018 clock and resetSricharan Ramabadhran
This patch adds support for the global clock controller found on the IPQ5018 based devices. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-08dt-bindings: clk: axg-audio-clkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-audio-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-14-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every A1 pll ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-13-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every A1 peripherals ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-12-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: meson8b-clkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every meson8b-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-11-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: g12a-aoclkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every g12a-aoclkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-10-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: g12a-clks: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every g12a-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-9-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: axg-clkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-8-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clk: gxbb-clkc: expose all clock idsNeil Armstrong
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every gxbb-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-7-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-08-08dt-bindings: clock: add Intel Agilex5 clock managerNiravkumar L Rabara
Add clock ID definitions for Intel Agilex5 SoCFPGA. The registers in Agilex5 handling the clock is named as clock manager. Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-08dt-bindings: reset: add reset IDs for Agilex5Niravkumar L Rabara
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use altr,rst-mgr-s10.h as common header file similar S10 & Agilex. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-07dt-bindings: interrupt-controller: Add header file for Amlogic Meson-G12A SoCsHuqiang Qin
Add a new dt-binding header that details the interrupt number of the GPIO. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230724060108.1403662-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMUChengci.Xu
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor translation table format. In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video output), the other is for vpp(video processing pipe). They connects with different smi-larbs, then some setting(larbid_remap) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... We also have an IOMMU that is for infra master like PCIe. And infra master don't have the larb and ports. Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-07-31dt-bindings: arm: qcom,ids: Add SoC ID for SM7125David Wronek
Add the SoC ID for Qualcomm SM7125. Signed-off-by: David Wronek <davidwronek@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230723190725.1619193-3-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC IDKathiravan T
IPQ5019 SoC is never productized. So lets drop it. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230724083745.1015321-3-quic_kathirav@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31dt-bindings: arm: qcom,ids: add SoC ID for SM4450Tengfei Fan
Add the ID for the Qualcomm SM4450 SoC. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230731080043.38552-6-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31dt-bindings: clock: drop qcom,lcc-mdm9615 header fileDmitry Baryshkov
The header file for qcom,lcc-mdm9615 and qcom,lcc-msm8960 is the same (as well as the drivers). Drop the qcom,lcc-mdm9615.h in favour of qcom,lcc-msm8960.h Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230512211727.3445575-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31dt-bindings: power: add Amlogic C3 power domainsXianwei Zhao
Add devicetree binding document and related header file for Amlogic C3 secure power domains. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230707003710.2667989-3-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-25dt-bindings: ti-serdes-mux: Deprecate header with constantsJayesh Choudhary
The constants to define the idle state of SERDES MUX were defined in bindings header. They are used only in DTS and driver uses the dt property to set the idle state making it unsuitable for bindings. The constants are moved to header next to DTS ("arch/arm64/boot/dts/ti/") and all the references to bindings header are removed. So add a warning to mark this bindings header as deprecated. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Roger Quadros <rogerq@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20230721125732.122421-3-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25dt-bindings: clock: imx93: Add PDM IPG clkChancel Liu
Add PDM IPG clk. Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230628061724.2056520-1-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-07-23dt-bindings: pinctrl: Add compatibles for Amlogic C3 SoCsHuqiang Qin
Add a new compatible name for Amlogic C3 pin controller, and add a new dt-binding header file which document the detail pin names. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230714122441.3098337-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-21Merge branch '1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' ↵Bjorn Andersson
into arm64-for-6.6 Merge the new generic RPMHPD defines from a topic branch, to alow them being used in DeviceTree source, and the driver.
2023-07-21dt-bindings: power: qcom,rpmhpd: Add Generic RPMh PD indexesRohit Agarwal
Add Generic RPMh Power Domain indexes that can be used for all the Qualcomm SoC henceforth. The power domain indexes of these bindings are based on compatibility with current targets like SM8[2345]50 targets. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-20dt-bindings: iio: adc: qcom,spmi-adc7: use predefined channel idsDmitry Baryshkov
Each of qcom,spmi-adc7-pm*.h headers define a set of ADC channels that can be used for monitoring on thie particular chip. Switch them to use channel IDs defined in the dt-bindings/iio/qcom,spmi-vadc.h header instead of specifying the numeric IDs. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230707123027.1510723-2-dmitry.baryshkov@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2023-07-19dt-bindings: clock: ast2600: Add I3C and MAC reset definitionsDylan Hung
Add reset definitions of AST2600 I3C and MAC controllers. In the case of the I3C reset, since there is no reset-line hardware available for `ASPEED_RESET_I3C_DMA`, a new macro `ASPEED_RESET_I3C` with the same ID is introduced to provide a more accurate representation of the hardware. The old macro `ASPEED_RESET_I3C_DMA` is kept to provide backward compatibility. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Link: https://lore.kernel.org/r/20230718062616.2822339-1-dylan_hung@aspeedtech.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-07-19dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generatorXingyu Wu
Add bindings for the Video-Output clock and reset generator (VOUTCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset ↵Xingyu Wu
generator Add bindings for the Image-Signal-Process clock and reset generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset ↵Xingyu Wu
generator Add bindings for the System-Top-Group clock and reset generator (STGCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19dt-bindings: clock: Add StarFive JH7110 PLL clock generatorXingyu Wu
Add bindings for the PLL clock generator on the JH7110 RISC-V SoC. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-18Merge branch 'icc-sm8250-qup' into icc-nextGeorgi Djakov
SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't provide a qup-core path. Adjust the bindings and drivers as necessary, and then describe the icc paths in the device tree. This makes it possible for interconnect sync_state succeed so long as you don't use UFS. * icc-sm8250-qup dt-bindings: interconnect: qcom,rpmh: Add SM8250 QUP virt dt-bindings: interconnect: qcom,sm8250: Add QUP virt interconnect: qcom: sm8250: Fix QUP0 nodes Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-07-16dt-bindings: interconnect: qcom,sm8250: Add QUP virtKonrad Dybcio
Add the required defines for QUP_virt nodes. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-2-9ba0a9460be2@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-07-15Merge branch '20230526-topic-smd_icc-v7-0-09c78c175546@linaro.org' into ↵Bjorn Andersson
clk-for-6.6 This series reshuffles things around, moving the management of SMD RPM bus clocks to the interconnect framework where they belong. This helps us solve a couple of issues: 1. We can work towards unused clk cleanup of RPMCC without worrying about it killing some NoC bus, resulting in the SoC dying. Deasserting actually unused RPM clocks (among other things) will let us achieve "true SoC-wide power collapse states", also known as VDD_LOW and VDD_MIN. 2. We no longer have to keep tons of quirky bus clock ifs in the icc driver. You either have a RPM clock and call "rpm set rate" or you have a single non-RPM clock (like AHB_CLK_SRC) or you don't have any. 3. There's less overhead - instead of going through layers and layers of the CCF, ratesetting comes down to calling max() and sending a single RPM message. ICC is very very dynamic so that's a big plus. The clocks still need to be vaguely described in the clk-smd-rpm driver, as it gives them an initial kickoff, before actually telling RPM to enable DVFS scaling. After RPM receives that command, all clocks that have not been assigned a rate are considered unused and are shut down in hardware, leading to the same issue as described in point 1. We can consider marking them __initconst in the future, but this series is very fat even without that.. Apart from that, it squashes a couple of bugs that really need fixing.. The series is merged through a topic branch to manage the dependencies between interconnect, Qualcomm clocks and Qualcomm SoC.
2023-07-15dt-bindings: interconnect: Add Qcom RPM ICC bindingsKonrad Dybcio
The SMD RPM interconnect driver requires different icc tags to the RPMh driver. Add bindings to reflect that. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20230526-topic-smd_icc-v7-1-09c78c175546@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' ↵Bjorn Andersson
into arm64-for-6.6 Merge a set of new SC8280XP GCC GDSC constants from a topic branch, in order to allow them being used in DeviceTree source.
2023-07-09Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' ↵Bjorn Andersson
into clk-for-6.6 Merge a set of new SC8280XP GCC GDSC constants through a topic branch, to allow them being introduce into the DeviceTree source as well.
2023-07-09dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCsKonrad Dybcio
There are 10 more GDSCs that we've not been caring about, and by extension (and perhaps even more importantly), not putting to sleep. Add them. Fixes: a66a82f2a55e ("dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings") Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09dt-bindings: clock: Add USB related clocks for IPQ9574Varadarajan Narayanan
Add the clocks needed for enabling USB in IPQ9574 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com [bjorn: Split from driver patch, to allow merging into dts tree] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-04Merge tag 'clk-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull more clk updates from Stephen Boyd: "Another set of clk driver updates and fixes for the merge window. The driver updates needed more time to bake in linux-next. Updates: - Support for more clk controllers in Qualcomm SoCs such as SM8350, SM8450, SDX75, SC8280XP, and IPQ9574 - Runtime PM enablement of some more Qualcomm clk controllers - Various fixes to Qualcomm clk driver data to use correct clk_ops and to check halt bits properly - AT91 updates to modernize with clk_parent_data structures Fixes: - Remove 'syscon' from dt binding fix for ti,j721e-system-controller - Fix determine rate in the Tegra driver that got wrecked by the refactorting of muxes this merge window" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits) clk: tegra: Avoid calling an uninitialized function dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id clk: at91: sama7g5: switch to parent_hw and parent_data clk: at91: sckc: switch to parent_data/parent_hw clk: at91: clk-sam9x60-pll: add support for parent_hw clk: at91: clk-utmi: add support for parent_hw clk: at91: clk-system: add support for parent_hw clk: at91: clk-programmable: add support for parent_hw clk: at91: clk-peripheral: add support for parent_hw clk: at91: clk-master: add support for parent_hw clk: at91: clk-generated: add support for parent_hw clk: at91: clk-main: add support for parent_data/parent_hw clk: qcom: gcc-sc8280xp: Add runtime PM clk: qcom: gpucc-sc8280xp: Add runtime PM clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags clk: qcom: gpucc-sm6375: Enable runtime pm dt-bindings: clock: sm6375-gpucc: Add VDD_GX clk: qcom: gcc-sm6115: Add missing PLL config properties clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) ...
2023-07-03Merge tag 'char-misc-6.5-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull Char/Misc updates from Greg KH: "Here is the big set of char/misc and other driver subsystem updates for 6.5-rc1. Lots of different, tiny, stuff in here, from a range of smaller driver subsystems, including pulls from some substems directly: - IIO driver updates and additions - W1 driver updates and fixes (and a new maintainer!) - FPGA driver updates and fixes - Counter driver updates - Extcon driver updates - Interconnect driver updates - Coresight driver updates - mfd tree tag merge needed for other updates on top of that, lots of small driver updates as patches, including: - static const updates for class structures - nvmem driver updates - pcmcia driver fix - lots of other small driver updates and fixes All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (243 commits) bsr: fix build problem with bsr_class static cleanup comedi: make all 'class' structures const char: xillybus: make xillybus_class a static const structure xilinx_hwicap: make icap_class a static const structure virtio_console: make port class a static const structure ppdev: make ppdev_class a static const structure char: misc: make misc_class a static const structure /dev/mem: make mem_class a static const structure char: lp: make lp_class a static const structure dsp56k: make dsp56k_class a static const structure bsr: make bsr_class a static const structure oradax: make 'cl' a static const structure hwtracing: hisi_ptt: Fix potential sleep in atomic context hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU hwtracing: hisi_ptt: Export available filters through sysfs hwtracing: hisi_ptt: Add support for dynamically updating the filter list hwtracing: hisi_ptt: Factor out filter allocation and release operation samples: pfsm: add CC_CAN_LINK dependency misc: fastrpc: check return value of devm_kasprintf() coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable() ...
2023-07-03Merge tag 'leds-next-6.5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds Pull LED updates from Lee Jones: "New Drivers: - Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs - Add support for Awinic AW20036/AW20054/AW20072 LEDs New Device Support: - Add support for PMI632 LPG to QCom LPG - Add support for PMI8998 to QCom Flash - Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC New Functionality: - Implement the LP55xx Charge Pump - Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC - Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC - Enable per-pin resolution Pinctrl in LEDs GPIO Fix-ups: - Allow thread to sleep by switching from spinlock to mutex - Add lots of Device Tree bindings / support - Adapt relationships / dependencies driven by Kconfig - Switch I2C drivers from .probe_new() to .probe() - Remove superfluous / duplicate code - Replace strlcpy() with strscpy() for efficiency and overflow prevention - Staticify various functions - Trivial: Fixing coding style - Simplify / reduce code Bug Fixes: - Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename - Repair race between led_set_brightness(LED_{OFF,FULL}) - Fix Oops relating to sleeping in critical sections - Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger - Do not leak resources in error handling paths - Fix unsigned comparison which can never be negative - Provide missing NULL terminating entries in tables - Fix misnaming issues" * tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (53 commits) leds: leds-mt6323: Adjust return/parameter types in wled get/set callbacks leds: sgm3140: Add richtek,rt5033-led compatible dt-bindings: leds: sgm3140: Document richtek,rt5033 compatible dt-bindings: backlight: kinetic,ktz8866: Add missing type for "current-num-sinks" dt-bindings: leds: Drop unneeded quotes leds: Fix config reference for AW200xx driver leds: leds-mt6323: Add support for WLEDs and MT6332 leds: leds-mt6323: Add support for MT6331 leds leds: leds-mt6323: Open code and drop MT6323_CAL_HW_DUTY macro leds: leds-mt6323: Drop MT6323_ prefix from macros and defines leds: leds-mt6323: Specify registers and specs in platform data dt-bindings: leds: leds-mt6323: Document mt6332 compatible dt-bindings: leds: leds-mt6323: Document mt6331 compatible leds: simatic-ipc-leds-gpio: Introduce more Kconfig switches leds: simatic-ipc-leds-gpio: Split up into multiple drivers leds: simatic-ipc-leds-gpio: Move two extra gpio pins into another table leds: simatic-ipc-leds-gpio: Add terminating entries to gpio tables leds: flash: leds-qcom-flash: Fix an unsigned comparison which can never be negative leds: cht-wcove: Remove unneeded semicolon leds: cht-wcove: Fix an unsigned comparison which can never be negative ...
2023-07-03Merge tag 'mfd-next-6.5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add support for TI TPS6594/TPS6593/LP8764 PMICs - Add support for Samsung RT5033 Battery Charger - Add support for Analog Devices MAX77540 and MAX77541 PMICs New Device Support: - Add support for SPI to Rockchip RK808 (and friends) - Add support for AXP192 PMIC to X-Powers AXP20X - Add support for AXP313a PMIC to X-Powers AXP20X - Add support for RK806 to Rockchip RK8XX Removed Device Support: - Removed MFD support for Richtek RT5033 Battery Fix-ups: - Remove superfluous code - Switch I2C drivers from .probe_new() to .probe() - Convert over to managed resources (devm_*(), etc) - Use dev_err_probe() for returning errors from .probe() - Add lots of Device Tree bindings / support - Improve cache efficiency by switching to Maple - Use own exported namespaces (NS) - Include missing and remove superfluous headers - Start using / convert to the new shutdown sys-off API - Trivial: variable / define renaming - Make use of of_property_read_reg() when requesting DT 'reg's Bug Fixes: - Fix chip revision readout due to incorrect data masking - Amend incorrect register and mask values used for charger state - Hide unused functionality at compile time - Fix resource leaks following error handling routines - Return correct error values and fix error handling in general - Repair incorrect device names - used for device matching - Remedy broken module auto-loading" * tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (51 commits) dt-bindings: mfd: max77541: Add ADI MAX77541/MAX77540 iio: adc: max77541: Add ADI MAX77541 ADC Support regulator: max77541: Add ADI MAX77541/MAX77540 Regulator Support dt-bindings: regulator: max77541: Add ADI MAX77541/MAX77540 Regulator mfd: Switch two more drivers back to use struct i2c_driver::probe dt-bindings: mfd: samsung,s5m8767: Simplify excluding properties mfd: stmpe: Only disable the regulators if they are enabled mfd: max77541: Add ADI MAX77541/MAX77540 PMIC Support dt-bindings: mfd: gateworks-gsc: Remove unnecessary fan-controller nodes mfd: core: Use of_property_read_reg() to parse "reg" mfd: stmfx: Nullify stmfx->vdd in case of error mfd: stmfx: Fix error path in stmfx_chip_init mfd: intel-lpss: Add missing check for platform_get_resource mfd: stpmic1: Add PMIC poweroff via sys-off handler mfd: stpmic1: Fixup main control register and bits naming dt-bindings: mfd: qcom,tcsr: Add the compatible for IPQ8074 mfd: tps65219: Add support for soft shutdown via sys-off API mfd: pm8008: Drop bogus i2c module alias mfd: pm8008: Fix module autoloading mfd: tps65219: Add GPIO cell instance ...
2023-06-30Merge tag 'pinctrl-v6.5-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ...
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