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path: root/include/dt-bindings/clock/exynos5250.h
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2015-07-24clk: exynos5250: add cpu clock configuration data and instantiate cpu clockThomas Abraham
With the addition of the new Samsung specific cpu-clock type, the arm clock can be represented as a cpu-clock type. Add the CPU clock configuration data and instantiate the CPU clock type for Exynos5250. Cc: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> [b.zolnierkie: split exynos5250 support from the original patch] [b.zolnierkie: moved E5250_CPU_DIV[0,1] macros to clk-exynos5250.c] Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
2014-07-26clk: samsung: trivial: Correct typo in author's nameTomasz Figa
This patch corrects mistyped author's name in four header files. While at it, a copy/paste error in author's e-mail in one of the headers is also fixed. Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-26clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocksCho KyongHo
This patch adds the missing sysmmu clocks for Display and ISP blocks. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-14clk: samsung: exynos5250: Add clocks for G3DArun Kumar K
This patch adds the required clocks for ARM Mali IP in Exynos5250. Signed-off-by: Arun Kumar K <arun.kk@samsung.com> [t.figa: Changed clock ID to avoid conflict with CLK_SSS] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14clk: samsung: exynos5250/5420: Add gate clock for SSS moduleNaveen Krishna Chatradhi
This patch adds gating clock for SSS(Security SubSystem) module on Exynos5250/5420. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> [t.figa: Fixed sort order and group name.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker
There is no gate for the PCM clock input to the AudioSS block, so the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that we can reference it in device trees. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08ARM: exynos5250: create a DT header defining CLK IDsAndrzej Hajda
The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>