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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)Author
2014-07-21Merge 3.16-rc6 into driver-core-nextGreg Kroah-Hartman
2014-07-21drm/i915: split conversion function out into separate functionDave Airlie
2014-07-21drm/i915: check connector->encoder before using it.Dave Airlie
2014-07-21i915: split some DP modesetting code into a separate functionDave Airlie
2014-07-21drm/i915: add some registers need for displayport MST support.Dave Airlie
2014-07-21drm/i915: fix psr match conditions screw ups.Dave Airlie
2014-07-19Merge tag 'drm-intel-next-2014-07-11' of git://anongit.freedesktop.org/drm-in...Dave Airlie
2014-07-18drm/i915: use helpersRob Clark
2014-07-14Revert "drm/i915: reverse dp link param selection, prefer fast over wide again"Dave Airlie
2014-07-14drm/i915: Track the primary plane correctly when reassigning planesDaniel Vetter
2014-07-14drm/i915: Ignore VBT backlight presence check on HP Chromebook 14Scot Doyle
2014-07-14Revert "drm/i915: Don't set the 8to6 dither flag when not scaling"Daniel Vetter
2014-07-12drm/i915: byt_gpu_freq() can be staticFengguang Wu
2014-07-12drm/i915/chv: calculate rc6 residency correctlyMika Kuoppala
2014-07-11drm/i915: Add RP1 render P state thresholds in CHVDeepak S
2014-07-11drm/i915/chv: Add basic PM interrupt support for CHVDeepak S
2014-07-11drm/i915: CHV GPU frequency to opcode functionsDeepak S
2014-07-11drm/i915: populate mem_freq/cz_clock for chvDeepak S
2014-07-11drm/i915: Add RP0/RP1/RPn render P state thresholds in VLV sysfsDeepak S
2014-07-11drm/i915: Read guaranteed freq for valleyviewDeepak S
2014-07-11drm/i915: Call encoder->post_disable() in intel_sanitize_encoder()Ville Syrjälä
2014-07-11drm/i915: ddi: enable runtime pm during dpmsDaniel Vetter
2014-07-11drm/i915: Use the cached min/min/rpe values in the vlv debugfs codeVille Syrjälä
2014-07-11drm/i915: Don't disable PPGTT for CHV based in PCI revVille Syrjälä
2014-07-10Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
2014-07-10drm/i915: Make the RPS interrupt generation mask handle the vlv waChris Wilson
2014-07-10drm/i915: Move RPS evaluation interval counters to i915->rpsChris Wilson
2014-07-10drm/i915: Don't cast a pointer to void* unnecessarilyDamien Lespiau
2014-07-10drm/i915: don't read LVDS regs at compute_config timePaulo Zanoni
2014-07-10drm/i915: check the power domains in intel_lvds_get_hw_state()Paulo Zanoni
2014-07-10drm/i915: check the power domains in ironlake_get_pipe_config()Paulo Zanoni
2014-07-10drm/i915: don't skip shared DPLL assertion on LPTPaulo Zanoni
2014-07-10drm/i915: Only touch WRPLL hw state in enable/disable hooksDaniel Vetter
2014-07-10drm/i915: Switch to common shared dpll framework for WRPLLsDaniel Vetter
2014-07-10drm/i915: ->enable hook for WRPLLsDaniel Vetter
2014-07-10drm/i915: ->disable hook for WRPLLsDaniel Vetter
2014-07-10drm/i915: State readout support for WRPLLsDaniel Vetter
2014-07-10drm/i915: add POWER_DOMAIN_PLLSPaulo Zanoni
2014-07-10drm/i915: Document that the pll->mode_set hook is optionalDaniel Vetter
2014-07-10drm/i915: Basic shared dpll support for WRPLLsDaniel Vetter
2014-07-10drm/i915: Precompute static ddi_pll_sel values in encodersDaniel Vetter
2014-07-10drm/i915: BDW also has special-purpose DP DDI clocksPaulo Zanoni
2014-07-10drm/i915: State readout and cross-checking for ddi_pll_selDaniel Vetter
2014-07-10drm/i915: Move ddi_pll_sel into the pipe configDaniel Vetter
2014-07-10drm/i915: Add a debugfs file for the shared dpll stateDaniel Vetter
2014-07-10drm/i915: Move SPLL disabling into hsw_crt_post_disableDaniel Vetter
2014-07-10drm/i915: Move the SPLL enabling into hsw_crt_pre_enableDaniel Vetter
2014-07-10drm/i915: ddi: move pch cleanup before encoder->post_disableImre Deak
2014-07-10drm/i915: ddi: move pch setup after encoder->pre_enableImre Deak
2014-07-10drm/i915: Clean up WRPLL/SPLL #definesDaniel Vetter
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