summaryrefslogtreecommitdiff
path: root/Documentation/devicetree
AgeCommit message (Collapse)Author
2025-09-03dt-bindings: display: samsung: Drop S3C2410Krzysztof Kozlowski
Samsung S3C24xx family of SoCs was removed from Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250830113238.131006-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: arm: Add Cortex-A320/A520AE/A720AE cores and PMURob Herring (Arm)
Add the recently introduced Cortex-A320/A520AE/A720AE core and PMU compatible strings. Link: https://lore.kernel.org/all/20250821190722.417639-1-robh@kernel.org/ Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: arm: cpus: Allow fsl,soc-operating-points for i.MX6Frank Li
The old i.MX6 (over 10 years) chip use fsl,soc-operating-points to get SoC's voltage and frequency information when cpu change frequency. Set fsl,soc-operating-points deprecated. Allow soc-supply property and set it deprecated. Fix bunch of CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6ul-prti6g.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250827210912.92029-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: display: dsi-controller: add bridge to patternPropertiesHarikrishna Shenoy
Extend the DSI controller schema to allow bridge child nodes. This makes it possible to describe external bridge devices directly connected as DSI peripherals. Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com> Link: https://lore.kernel.org/r/20250827112539.4001513-1-h-shenoy@ti.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: interrupt-controller: marvell,cp110-icu: Document address-cellsKrzysztof Kozlowski
The CP110 ICU children are interrupt controllers and can be referenced in interrupt-map properties (e.g. in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi), thus the nodes should have address-cells property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20250823163258.49648-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: vendor-prefixes: Add undocumented vendor prefixesRob Herring (Arm)
Add various vendor prefixes which are in use in compatible strings already. These were found by modifying vendor-prefixes.yaml into a schema to check compatible strings. The added prefixes doesn't include various duplicate prefixes in use such as "lge". Link: https://lore.kernel.org/r/20250821222136.1027269-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: display: rockchip,dw-mipi-dsi: Narrow clocks for ↵Krzysztof Kozlowski
rockchip,rk3288-mipi-dsi The binding allows in top-level from one to four clocks and each variant narrows the choice, but rockchip,rk3288-mipi-dsi missed the minItems. Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-3-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: display: ti,tdp158: Add missing reg constraintKrzysztof Kozlowski
Device can be used over I2C bus, so it documents 'reg' property, however it misses to constrain it to actual I2C address. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-2-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: display: ingenic,jz4780-hdmi: Add missing clock-namesKrzysztof Kozlowski
The binding references synopsys,dw-hdmi.yaml schema which defines both 'clocks' and 'clock-names' with variable length, therefore we need here also same constraint for 'clock-names' as for 'clocks'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-1-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03yamllint: Drop excluding quoted values with ',' from checksRob Herring
Strings with commas were excluded from checks because yamllint had false positives for flow style maps and sequences which need quotes when values contain commas. This issue has been fixed as of the 1.34 release, so drop the work-around. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240426195438.2771968-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03docs: devicetree: fix typo in writing-schema.rstSantosh Mahto
Fixes a spelling mistake in writing-schema.rst: "interpretted" → "interpreted" Signed-off-by: Santosh Mahto <eisantosh95@gmail.com> Link: https://lore.kernel.org/r/20250820181013.17817-1-eisantosh95@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03docs: dt: writing-bindings: Document node name ABI and simple-mfdKrzysztof Kozlowski
Document established Devicetree bindings maintainers review practice: 1. Device node names should not be treated as an ABI, unless for children of a device when documented. There were many patches posted using of_find_node_by_name() or of_node_name_eq() for accessing siblings or completely different nodes. These cases were introducing undocumented ABI, so they are discouraged. 2. 'simple-mfd' means children do not depend on parent device resources. 'simple-bus' is so simple, that even 'reg' properties are not applicable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250818132534.120217-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: soc: add vf610 reboot syscon controllerFrank Li
Add vf610 reboot controller, which used to reboot whole system. Fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/vf/vf610-bk4.dtb: /soc/bus@40000000/src@4006e000: failed to match any schema with compatible: ['fsl,vf610-src', 'syscon'] IC reference manual calls it as system reset controller(SRC), but it is not module as reset controller, which used to reset individual device. SRC works as reboot controller, which reboots whole system. It provides a syscon interface to syscon-reboot. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250819165317.3739366-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-03dt-bindings: input: touchscreen: tsc2007: Document 'wakeup-source'Fabio Estevam
The 'wakeup-source' property is used by many devicetree files and is also supported by the tsc2007_core driver. Document it to avoid the following dt-schema warning: 'wakeup-source' does not match any of the regexes: '^pinctrl-[0-9]+$' Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250822213245.125901-1-festevam@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-09-03dt-bindings: input: tsc2007: use comma in filenameAndreas Kemnade
Use comma between vendor-prefix and chip name as it is common. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Fixes: 45601c66b5dd ("dt-bindings: input: touchscreen: convert tsc2007.txt to yaml format") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250830085326.36120-1-akemnade@kernel.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-09-03ASoC: dt-bindings: qcom: Add Glymur LPASS wsa and va macro codecsSrinivas Kandagatla
Document compatibles for Qualcomm Glymur SoC macro digital codecs (VA and WSA), compatible with previous generation (SM8550 and SM8650). Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20250902140044.54508-5-srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-03ASoC: dt-bindings: qcom,sm8250: Add glymur sound cardSrinivas Kandagatla
Document the bindings for the glymur sound card which is audioreach based architecture. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20250902140044.54508-3-srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-03dt-bindings: arm: aspeed: add Meta Clemente boardLeo Wang
Document the new compatibles used on Meta Clemente. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Leo Wang <leo.jt.wang@gmail.com> Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-1-8970d41f88b0@fii-foxconn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-02dt-bindings: net: move ptp-timer property to ethernet-controller.yamlWei Fang
For some Ethernet controllers, the PTP timer function is not integrated. Instead, the PTP timer is a separate device and provides PTP Hardware Clock (PHC) to the Ethernet controller to use, such as NXP FMan MAC, ENETC, etc. Therefore, a property is needed to indicate this hardware relationship between the Ethernet controller and the PTP timer. Since this use case is also very common, it is better to add a generic property to ethernet-controller.yaml. According to the existing binding docs, there are two good candidates, one is the "ptp-timer" defined in fsl,fman-dtsec.yaml, and the other is the "ptimer-handle" defined in fsl,fman.yaml. From the perspective of the name, the former is more straightforward, so move the "ptp-timer" from fsl,fman-dtsec.yaml to ethernet-controller.yaml. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250829050615.1247468-3-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02dt-bindings: ptp: add NETC Timer PTP clockWei Fang
NXP NETC (Ethernet Controller) is a multi-function PCIe Root Complex Integrated Endpoint (RCiEP), the Timer is one of its functions which provides current time with nanosecond resolution, precise periodic pulse, pulse on timeout (alarm), and time capture on external pulse support. And also supports time synchronization as required for IEEE 1588 and IEEE 802.1AS-2020. So add device tree binding doc for the PTP clock based on NETC Timer. NETC Timer has three reference clock sources, but the clock mux is inside the IP. Therefore, the driver will parse the clock name to select the desired clock source. If the clocks property is not present, NETC Timer will use the system clock of NETC IP as its reference clock. Because the Timer is a PCIe function of NETC IP, the system clock of NETC is always available to the Timer. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250829050615.1247468-2-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02dt-bindings: pinctrl: samsung: Drop S3C2410Krzysztof Kozlowski
Samsung S3C24xx family of SoCs was removed the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250830111657.126190-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-02dt-bindings: leds: issi,is31fl319x: Drop 'db' suffix duplicating dtschemaKrzysztof Kozlowski
A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250811-dt-bindings-db-v1-1-457301523bb5@linaro.org Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02dt-bindings: arm: samsung: Drop S3C2416Krzysztof Kozlowski
Samsung S3C24xx family of SoCs was removed from the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250830113253.131974-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-02dt-bindings: mtd samsung-s3c2410: Drop S3C2410 supportKrzysztof Kozlowski
Samsung S3C24xx family of SoCs was removed from the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of its compatibles. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-09-02dt-bindings: arm: Add device Trace Network On Chip definitionYuanfang Zhang
Add a new coresight-tnoc.yaml file to describe the bindings required to define Trace Network On Chip (TNOC) in device trees. TNOC is an integration hierarchy which is a hardware component that integrates the functionalities of TPDA and funnels. It collects trace form subsystems and transfers to coresight sink. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250710-trace-noc-v11-1-f849075c40b8@quicinc.com
2025-09-02dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCsTommaso Merciai
The DMAC block on the RZ/G3E SoC is identical to the one found on the RZ/V2H(P) SoC. No driver changes are required, as `renesas,r9a09g057-dmac` will be used as a fallback compatible string on the RZ/G3E SoC. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250801084825.471011-3-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-02dt-bindings: dma: Add SpacemiT K1 PDMA controllerGuodong Xu
Add device tree binding documentation for the SpacemiT K1 PDMA controller. Signed-off-by: Guodong Xu <guodong@riscstar.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-1-f5c0eda734cc@riscstar.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-02dt-bindings: dmaengine: xilinx_dma: Remove DMA client propertiesAbin Joseph
Remove DMA client section mentioned in the dt-bindings as it is not required to document client bindings in dmaengine bindings. Signed-off-by: Abin Joseph <abin.joseph@amd.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Abin Joseph <abin.joseph@amd.com> Link: https://lore.kernel.org/r/20250825130423.5739-1-abin.joseph@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-02dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2Jonas Karlman
The NanoPi Zero2 is small single board computer developed by FriendlyElec, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the FriendlyElec NanoPi Zero2 board. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717103720.2853031-6-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-09-02dt-bindings: arm: rockchip: Add ArmSoM Sige1Jonas Karlman
The Sige1 is a single board computer developed by ArmSoM, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the ArmSoM Sige1 board. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717103720.2853031-4-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-09-02dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2FJonas Karlman
The ROCK 2A and ROCK 2F is a high-performance single board computer developed by Radxa, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the Radxa ROCK 2A and ROCK 2F boards. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717103720.2853031-2-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-09-02dt-bindings: soc: rockchip: add missing clock reference for rk3576-dcphy sysconHeiko Stuebner
The rk3576 mipi dcphy syscon controls a clock, so needs to allow the clock property. Add the missing entry in the list for it. Fixes: 0e3f3d7c7ae3 ("dt-bindings: soc: rockchip: add rk3576 mipi dcphy syscon") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202508271156.z3wDB6bX-lkp@intel.com/ Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250828131107.3531769-1-heiko@sntech.de
2025-09-01dt-bindings: arm: qcom: Add Dell Inspiron 14 Plus 7441Bryan O'Donoghue
Document the X1E80100-based Dell Inspiron 14 Plus 7441 laptop, codename: Thena. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Laurentiu Tudor <laurentiu.tudor1@dell.com> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250716003139.18543-2-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: Add Billion Capture+Cristian Cozzolino
Billion Capture+ (flipkart,rimob) is a smartphone based on Qualcomm Snapdragon 625 (MSM8953). Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-2-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: vendor-prefixes: Add FlipkartCristian Cozzolino
Add Flipkart to the vendor prefixes. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-1-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: document r8q board bindingEric Gonçalves
Add binding for the Samsung Galaxy S20 FE 4G/5G (SM-G980/SM-G981B) board, codenamed R8Q, which is based on the Qualcomm Snapdragon 865 SoC. Signed-off-by: Eric Gonçalves <ghatto404@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250815151426.32023-2-ghatto404@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: Add Lenovo TB16 supportJens Glathe
Document the x1p-42-100/x1-26-100 variants of the Thinkbook 16 G7 QOY. [1]: https://psref.lenovo.com/syspool/Sys/PDF/ThinkBook/ThinkBook_16_G7_QOY/ThinkBook_16_G7_QOY_Spec.pdf Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20250822-tb16-dt-v12-1-bab6c2986351@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1051Maud Spierings
TCAN1051-Q1 Automotive Fault Protected CAN Transceiver with CAN FD It is pretty much identical to the TCAN1042, add the compatible with fallback on the TCAN1042. Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250822-can_phy3-v1-1-73b3ba1690ee@gocontroll.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-01dt-bindings: display: sitronix,st7567: add optional inverted propertyMarcus Folkesson
Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported format (R1) expects the pixels to map against: 0 => Black 1 => White If this is not what the display map against, the controller has support to invert these values. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-3-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01dt-bindings: display: sitronix,st7571: add optional inverted propertyMarcus Folkesson
Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported formats (R1/R2/XRGB8888) expects the pixels to map against (4bit): 00 => Black 01 => Dark Gray 10 => Light Gray 11 => White If this is not what the display map against, the controller has support to invert these values. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-2-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01dt-bindings: lpspi: Document support for S32GLarisa Grigore
Add compatible strings 'nxp,s32g2-lpspi' and 'nxp,s32g3-lpspi' for S32G2 and S32G3. Require nxp,s32g3-lpspi to fallback to nxp,s32g2-lpspi since they are currently compatible. Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250828-james-nxp-lpspi-v2-5-6262b9aa9be4@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-01dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU supportMichal Wilczynski
Rework the PowerVR Rogue GPU binding to use an explicit, per variant style for defining power domain properties and add support for the T-HEAD TH1520 SoC's GPU. To improve clarity and precision, the binding is refactored so that power domain items are listed explicitly for each variant [1]. The previous method relied on an implicit, positional mapping between the `power-domains` and `power-domain-names` properties. This change replaces the generic rules with self contained if/then blocks for each GPU variant, making the relationship between power domains and their names explicit and unambiguous. The generic if block for img,img-rogue, which previously required power-domains and power-domain-names for all variants, is removed. Instead, each specific GPU variant now defines its own power domain requirements within a self-contained if/then block, making the schema more explicit. This new structure is then used to add support for the `thead,th1520-gpu`. While its BXM-4-64 IP has two conceptual power domains, the TH1520 SoC integrates them behind a single power gate. The new binding models this with a specific rule that enforces a single `power-domains` entry and disallows the `power-domain-names` property. Link: https://lore.kernel.org/all/4d79c8dd-c5fb-442c-ac65-37e7176b0cdd@linaro.org/ [1] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://lore.kernel.org/r/20250822-apr_14_for_sending-v13-2-af656f7cc6c3@samsung.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-09-01Merge tag 'sti-dt-for-v6.18-round1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into soc/dt STi dt fixes: - Drop STiH407/10-B2120 DT boards and bindings. - Remove remaining STiH415/6 reference from STi machine. - Fix phy-names value for stih407-family.dtsi. * tag 'sti-dt-for-v6.18-round1' of https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: sti: drop B2120 board support ARM: sti: removal of stih415/stih416 related entries dt-bindings: arm: sti: drop B2120 board support ARM: dts: sti: rename SATA phy-names Link: https://lore.kernel.org/r/e4703e99-e44e-41d2-b744-a12ed4cb6692@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'renesas-dts-for-v6.18-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.18 - Add initial support for the RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs and their evaluation boards, - Add SPI support for the RZ/V2H SoC, - Add DMAC and I3C support for the RZ/G3E SoC, - Add I3C support for the RZ/G3S SoCs, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (31 commits) arm64: dts: renesas: Minor whitespace cleanup arm64: dts: renesas: sparrow-hawk: Set VDDQ18_25_AVB voltage on EVTB1 arm64: dts: renesas: sparrow-hawk: Invert microSD voltage selector on EVTB1 arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Enable I2C0 and I2C1 support arm64: dts: renesas: r9a09g077: Add pinctrl node arm64: dts: renesas: r9a09g087: Add DT nodes for SCI channels 1-5 arm64: dts: renesas: r9a09g077: Add DT nodes for SCI channels 1-5 arm64: dts: renesas: r9a09g047: Add I3C node arm64: dts: renesas: r9a08g045: Add I3C node arm64: dts: renesas: sparrow-hawk: Update thermal trip points arm64: dts: renesas: rzg2: Increase CANFD clock rates arm64: dts: renesas: rcar-gen3: Increase CANFD clock rates ARM: dts: renesas: porter: Fix CAN pin group ARM: dts: renesas: r7s72100: Add boot phase tags arm64: dts: renesas: sparrow-hawk: Describe generic SPI NOR support arm64: dts: renesas: rzg2lc-smarc: Disable CAN-FD channel0 arm64: dts: renesas: r9a09g047: Add DMAC nodes arm64: dts: renesas: r9a09g057h48-kakip: Fix misplaced article arm64: dts: renesas: r9a09g087: Add SDHI nodes arm64: dts: renesas: r9a09g077: Add SDHI nodes ... Link: https://lore.kernel.org/r/cover.1756468048.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'ixp4xx-dts-v6.18' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into soc/dt IXP4xx DTS updates for v6.18: Add the Actiontec router MI424WR A/C and D device trees. Prerequisite DT bindings have been merged in networking and GPIO git trees: https://lore.kernel.org/netdev/175106401649.2079310.16035106613106076029.git-patchwork-notify@kernel.org/ https://lore.kernel.org/linux-gpio/175614780274.8817.4717113656972710108.b4-ty@linaro.org/ * tag 'ixp4xx-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: dts: Add ixp4xx Actiontec MI424WR device trees dt-bindings: arm: ixp4xx: List actiontec devices dt-bindings: Add Actiontec vendor prefix Link: https://lore.kernel.org/r/CACRpkdZoDCXgsTGzUUWABbp_r1Xjv7vp7_NjEnEWzMmDQG+UJQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'aspeed-6.18-devicetree-0' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt Early ASPEED devicetree updates for 6.18 Notable changes: - Meta's Wedge400 and Fuji boards have had parallel devicetrees added for a transition to a new static flash layout. The original layout is deprecated and I anticipate removing related devicetrees in future releases. New platforms: - Darwin (Meta) Darwin is Meta's rack switch platform with an AST2600 BMC integrated for health monitoring purpose. Updates and fixes: - GB200NVL (Nvidia): Networking, I2C, regulators, GPIOs - Wedge400, Fuji (Meta): Fix warnings from devicetree bindings - Use fixed-layout for NVMEM on Asrock platforms - Various: minor fixes for warnings from FSI devicetree bindings * tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (24 commits) ARM: dts: aspeed: x570d4u: convert NVMEM content to layout syntax ARM: dts: aspeed: romed8hm3: convert NVMEM content to layout syntax ARM: dts: aspeed: e3c256d4i: convert NVMEM content to layout syntax ARM: dts: aspeed: e3c246d4i: convert NVMEM content to layout syntax ARM: dts: aspeed: Add missing "ibm,spi-fsi" compatibles ARM: dts: aspeed: Drop "fsi-master" compatibles ARM: dts: aspeed: Drop "no-gpio-delays" ARM: dts: aspeed: Add Facebook Darwin (AST2600) BMC dt-bindings: arm: aspeed: add Facebook Darwin board ARM: dts: aspeed: facebook-fuji: Include facebook-fuji-data64.dts ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board dt-bindings: arm: aspeed: add Facebook Fuji-data64 board ARM: dts: aspeed: wedge400: Include wedge400-data64.dts ARM: dts: aspeed: Add Facebook Wedge400-data64 (AST2500) BMC dt-bindings: arm: aspeed: add Facebook Wedge400-data64 board ARM: dts: aspeed: Add facebook-bmc-flash-layout-128-data64.dtsi ARM: dts: aspeed: Move eMMC out of ast2600-facebook-netbmc-common.dtsi ARM: dts: aspeed: Fix DTB warnings in ast2600-facebook-netbmc-common.dtsi ARM: dts: aspeed: fuji: Fix DTB warnings ARM: dts: aspeed: wedge400: Fix DTB warnings ... Link: https://lore.kernel.org/r/cb634cffaf0db9d25fb3062f0eee41e03955321f.camel@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01dt-bindings: gpio: Add Tegra256 supportPrathamesh Shete
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra256. The number of pins is slightly different, but the programming model remains the same Add a new header, include/dt-bindings/gpio/tegra256-gpio.h, that defines port IDs as well as the TEGRA256_MAIN_GPIO() helper, both of which are used in conjunction to create a unique specifier for each pin. The OS can reconstruct the port ID and pin from these values to determine the register region for the corresponding GPIO. However, the OS does not use the macro definitions in this file. The symbolic names help associate these GPIO specifiers with the names used in the technical documentation available for the chip. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250823055420.24664-1-pshete@nvidia.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-01dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-8 SoCSeonGu Kang
Document the compatible string for ARTPEC-8 SoC pinctrl block, which is similar to other Samsung SoC pinctrl blocks. Signed-off-by: SeonGu Kang <ksk4725@coasia.com> Signed-off-by: Ravi Patel <ravi.patel@samsung.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250901051926.59970-2-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-08-31dt-bindings: arm: apple: Add t8112 j415 compatibleJanne Grunau
This adds the "apple,j415" (MacBook Air (15-inch, M2, 2023) to the apple,t8112 platform. Reviewed-by: Neal Gompa <neal@gompa.dev> Reviewed-by: Sven Peter <sven@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250823-apple-dt-sync-6-17-v2-4-6dc0daeb4786@jannau.net Signed-off-by: Sven Peter <sven@kernel.org>
2025-08-31dt-bindings: arm: Convert Axis board/soc bindings to json-schemaRavi Patel
Convert Axis SoC bindings to DT schema format using json-schema. Existing bindings supports ARTPEC-6 SoC and board. Signed-off-by: SungMin Park <smn1196@coasia.com> Signed-off-by: SeonGu Kang <ksk4725@coasia.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ravi Patel <ravi.patel@samsung.com> Link: https://lore.kernel.org/r/20250825114436.46882-7-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
generated by cgit v1.2.3 (git 2.46.0) at 2026-05-19 09:13:45 +0000