kernel - Hosts the 0x221E linux distro kernel.

Age	Commit message (Collapse)	Author
2022-09-29	dt-bindings: timer: Add power-domains for TI timer-dm on K3	Tony Lindgren
	On K3 SoCs, the power-domains property is needed. On the earlier SoCs, the power-domains property is handled by the interconnect target module parent device. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220919112357.64997-1-tony@atomide.com Signed-off-by: Rob Herring <robh@kernel.org>
2022-04-25	dt-bindings: timer: Add compatible for am6 for TI timer-dm	Tony Lindgren
	Let's add compatible for ti,am654-timer for TI am64, am65 and j72 SoCs. As the timer hardware is the same between am64, am65 and j72 we use the compatible name for the earliest SoC with this timer. The timer interrupts are not routable for the operating system for some timers on am6. Let's make sure the interrupts are configured for the timers on all other SoCs. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220414085807.7389-3-tony@atomide.com
2022-04-25	dt-bindings: timer: Update TI timer to yaml	Tony Lindgren
	Let's update the TI timer binding to use yaml. As this binding is specific to the TI dual-mode timers also known as dm-timers, let's use file name ti,timer-dm.yaml to avoid confusion with other timers. We add checks for the deprecated ti,hwmods property as done for other TI device driver bindings earlier. We also correct the issue with the old binding that was out of date for several properties. The am43 related timers are undocumented, but compatible with the am3 timers. Let's add the am43 timers too. The dm814 and dm816 timers are missing, let's add them. Some timers on some SoCs are dual mapped, like the ABE timers on omap4 and 5. The reg property maxItems must be updated to 2. The timer clocks can be managed by the parent interconnect target module with no clocks assigned for the timer node. And in some cases, the SoC may need to configure additional system clock for the timer in addition to the functional clock. The clock names are optional and not specific to the comptible property. For example, dra7 timers on l3 interconnect do not need clock-names, while the timers on dra7 l4 interconnect need them with both being compatible with ti,omap5430-timer. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220414085807.7389-2-tony@atomide.com