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authorClaudiu Manoil <claudiu.manoil@nxp.com>2026-01-30 16:10:35 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-02-11 13:41:57 +0100
commit5a2b4b0e9c00388d49e200620f1f1614a6dceb49 (patch)
tree97dd86a0f4e96bbfea1c43373a322081e29cde0f /tools/perf/scripts/python
parent566ea5769ec276e96462722e17ffc4467a61b34e (diff)
net: enetc: Convert 16-bit register reads to 32-bit for ENETC v4
[ Upstream commit c28d765ec5da160d3a48d0928528084cef97bf19 ] It is not recommended to access the 32‑bit registers of this hardware IP using lower‑width accessors (i.e. 16‑bit), and the only exception to this rule was introduced in the initial ENETC v1 driver for the PMAR1 register, which holds the lower 16 bits of the primary MAC address of an SI. Meanwhile, this exception has been replicated in the v4 driver code as well. Since LS1028 (the only SoC with ENETC v1) is not affected by this issue, the current patch converts the 16‑bit reads from PMAR1 starting with ENETC v4. Fixes: 99100d0d9922 ("net: enetc: add preliminary support for i.MX95 ENETC PF") Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by: Wei Fang <wei.fang@nxp.com> Link: https://patch.msgid.link/20260130141035.272471-5-claudiu.manoil@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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