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authorZihao Yu <yuzihao@ict.ac.cn>2021-03-17 16:17:25 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-04-16 11:38:14 +0200
commitd5ecd2faa5221fd7e3f316cdd19a0a8672b95f81 (patch)
tree81193f8c815903dcb21e40aaefd94967c3f66944 /include/uapi/linux/virtio_gpu.h
parent4d0fcd37bbcb0deb90fbbe755438faa93e1d72a4 (diff)
riscv,entry: fix misaligned base for excp_vect_table
[ Upstream commit ac8d0b901f0033b783156ab2dc1a0e73ec42409b ] In RV64, the size of each entry in excp_vect_table is 8 bytes. If the base of the table is not 8-byte aligned, loading an entry in the table will raise a misaligned exception. Although such exception will be handled by opensbi/bbl, this still causes performance degradation. Signed-off-by: Zihao Yu <yuzihao@ict.ac.cn> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include/uapi/linux/virtio_gpu.h')
0 files changed, 0 insertions, 0 deletions