summaryrefslogtreecommitdiff
path: root/include/net/aligned_data.h
diff options
context:
space:
mode:
authorBreno Leitao <leitao@debian.org>2026-01-26 09:50:28 -0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-02-11 13:42:00 +0100
commit2d3c0122e96111d38382f7a1ac00848865c969f6 (patch)
tree1bc071e216f4d6427dacf03fb0d180062d6dfb3b /include/net/aligned_data.h
parent51013068438acbc1fed8e08dc34e32e63665d7d1 (diff)
spi: tegra210-quad: Protect curr_xfer assignment in tegra_qspi_setup_transfer_one
[ Upstream commit f5a4d7f5e32ba163cff893493ec1cbb0fd2fb0d5 ] When the timeout handler processes a completed transfer and signals completion, the transfer thread can immediately set up the next transfer and assign curr_xfer to point to it. If a delayed ISR from the previous transfer then runs, it checks if (!tqspi->curr_xfer) (currently without the lock also -- to be fixed soon) to detect stale interrupts, but this check passes because curr_xfer now points to the new transfer. The ISR then incorrectly processes the new transfer's context. Protect the curr_xfer assignment with the spinlock to ensure the ISR either sees NULL (and bails out) or sees the new value only after the assignment is complete. Fixes: 921fc1838fb0 ("spi: tegra210-quad: Add support for Tegra210 QSPI controller") Signed-off-by: Breno Leitao <leitao@debian.org> Tested-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://patch.msgid.link/20260126-tegra_xfer-v2-3-6d2115e4f387@debian.org Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include/net/aligned_data.h')
0 files changed, 0 insertions, 0 deletions