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authorJason Gunthorpe <jgg@nvidia.com>2025-11-27 19:54:08 -0400
committerJoerg Roedel <joerg.roedel@amd.com>2025-11-28 08:43:55 +0100
commit1eb0ae6fbd544619c50b4a4d96ccb4676cac03cb (patch)
tree43bae54d7fee3fa9d047271cec63a9ce14f1c5ca /drivers/iommu/amd/iommu.c
parentd856f9d27885c499d96ab7fe506083346ccf145d (diff)
iommupt/vtd: Support mgaw's less than a 4 level walk for first stage
If the IOVA is limited to less than 48 the page table will be constructed with a 3 level configuration which is unsupported by hardware. Like the second stage the caller needs to pass in both the top_level an the vasz to specify a table that has more levels than required to hold the IOVA range. Fixes: 6cbc09b7719e ("iommu/vt-d: Restore previous domain::aperture_end calculation") Reported-by: Calvin Owens <calvin@wbinvd.org> Closes: https://lore.kernel.org/r/8f257d2651eb8a4358fcbd47b0145002e5f1d638.1764237717.git.calvin@wbinvd.org Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Tested-by: Calvin Owens <calvin@wbinvd.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/iommu/amd/iommu.c')
-rw-r--r--drivers/iommu/amd/iommu.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 48bca4dc8eb6..273951b4501c 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2708,10 +2708,13 @@ static struct iommu_domain *amd_iommu_domain_alloc_paging_v2(struct device *dev,
* in both modes the top bit is removed and PT_FEAT_SIGN_EXTEND is not
* set which creates a table that is compatible in both modes.
*/
- if (amd_iommu_gpt_level == PAGE_MODE_5_LEVEL)
+ if (amd_iommu_gpt_level == PAGE_MODE_5_LEVEL) {
cfg.common.hw_max_vasz_lg2 = 56;
- else
+ cfg.top_level = 4;
+ } else {
cfg.common.hw_max_vasz_lg2 = 47;
+ cfg.top_level = 3;
+ }
cfg.common.hw_max_oasz_lg2 = 52;
domain->domain.ops = &amdv2_ops;