diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2025-02-12 18:36:36 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-02-13 10:21:27 +0200 |
| commit | 53ba0e1d6618366171091b1c1a316e753029757f (patch) | |
| tree | 2b848acb94dcf362e411b5b24a006345a507f66b /drivers/gpu/drm/i915/display/g4x_dp.c | |
| parent | b97b429192191d73eeadea617df9b6db6422d05e (diff) | |
drm/i915/display: convert intel_set_{cpu,pch}_fifo_underrun_reporting() to intel_display
Going forward, struct intel_display is the main display device data
pointer. Convert intel_set_cpu_fifo_underrun_reporting() and
intel_set_pch_fifo_underrun_reporting() to struct intel_display, along
with some of the call chains from there.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3b984d0183214d05d0cdecad35184ea8d89ae050.1739378095.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/g4x_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/g4x_dp.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c index 4b51a4e47f63..0cb98cb043c6 100644 --- a/drivers/gpu/drm/i915/display/g4x_dp.c +++ b/drivers/gpu/drm/i915/display/g4x_dp.c @@ -453,8 +453,8 @@ intel_dp_link_down(struct intel_encoder *encoder, * We get CPU/PCH FIFO underruns on the other pipe when * doing the workaround. Sweep them under the rug. */ - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, false); + intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false); /* always enable with pattern 1 (as per spec) */ intel_dp->DP &= ~(DP_PIPE_SEL_MASK | DP_LINK_TRAIN_MASK); @@ -468,8 +468,8 @@ intel_dp_link_down(struct intel_encoder *encoder, intel_de_posting_read(display, intel_dp->output_reg); intel_wait_for_vblank_if_active(display, PIPE_A); - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, true); + intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true); } msleep(intel_dp->pps.panel_power_down_delay); |