diff options
| author | Dave Jiang <dave.jiang@intel.com> | 2025-03-07 13:55:31 -0700 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2025-03-17 14:41:36 -0300 |
| commit | 858ce2f56b5253063f61f6b1c58a6dbf5d71da0b (patch) | |
| tree | da88bcfb46f33a7e2f53a72dc7dd0800e89f9d7c /drivers/cxl/Kconfig | |
| parent | 15a26c223fff58d9fa4ada12a8c35697f8ecdf6c (diff) | |
cxl: Add FWCTL support to CXL
Add fwctl support code to allow sending of CXL feature commands from
userspace through as ioctls via FWCTL. Provide initial setup bits. The
CXL PCI probe function will call devm_cxl_setup_fwctl() after the
cxl_memdev has been enumerated in order to setup FWCTL char device under
the cxl_memdev like the existing memdev char device for issuing CXL raw
mailbox commands from userspace via ioctls.
Link: https://patch.msgid.link/r/20250307205648.1021626-2-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Li Ming <ming.li@zohomail.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/cxl/Kconfig')
| -rw-r--r-- | drivers/cxl/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index ad2e796e4ac6..8ac1e9d70eeb 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -7,6 +7,7 @@ menuconfig CXL_BUS select PCI_DOE select FIRMWARE_TABLE select NUMA_KEEP_MEMINFO if NUMA_MEMBLKS + select FWCTL if CXL_FEATURES help CXL is a bus that is electrically compatible with PCI Express, but layers three protocols on that signalling (CXL.io, CXL.cache, and |