diff options
| author | Vladimir Zapolskiy <vz@mleia.com> | 2025-12-29 00:49:07 +0200 |
|---|---|---|
| committer | Sasha Levin <sashal@kernel.org> | 2026-03-04 07:19:37 -0500 |
| commit | 716c8ebe0409b1e42a38ab6b57d58aca659e5f67 (patch) | |
| tree | ab9ff734d59ba17dd0ccd38bf8e839ad3f69342f /arch | |
| parent | 8461f646f68a02a97f81fe202f50c62cda122520 (diff) | |
arm: dts: lpc32xx: add clocks property to Motor Control PWM device tree node
[ Upstream commit 71630e581a0e34c03757f5c1706f57c853b92555 ]
Motor Control PWM depends on its own supply clock, the clock gate control
is present in TIMCLK_CTRL1 register.
Fixes: b7d41c937ed7 ("ARM: LPC32xx: Add the motor PWM to base dts file")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi index 770e85b8268f..7503074d2877 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi @@ -301,6 +301,7 @@ mpwm: mpwm@400e8000 { compatible = "nxp,lpc3220-motor-pwm"; reg = <0x400e8000 0x78>; + clocks = <&clk LPC32XX_CLK_MCPWM>; #pwm-cells = <3>; status = "disabled"; }; |