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authordecce6 <decce6@proton.me>2026-02-10 07:24:01 +0000
committerSasha Levin <sashal@kernel.org>2026-03-04 07:20:08 -0500
commit986fee4b7458044bfbe5714532e84d1cbaa4cb36 (patch)
treec30e931daeec2c57c95e0b4650de392b55d020e0
parent325fa402c09af21fb86052fe1628479d33b267ca (diff)
drm/amdgpu: Add HAINAN clock adjustment
[ Upstream commit 49fe2c57bdc0acff9d2551ae337270b6fd8119d9 ] This patch limits the clock speeds of the AMD Radeon R5 M420 GPU from 850/1000MHz (core/memory) to 800/950 MHz, making it work stably. This patch is for amdgpu. Signed-off-by: decce6 <decce6@proton.me> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--drivers/gpu/drm/amd/pm/powerplay/si_dpm.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c b/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
index ece892b16d9a..47d18f129cac 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
@@ -3426,6 +3426,11 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
max_sclk = 60000;
max_mclk = 80000;
}
+ if ((adev->pdev->device == 0x666f) &&
+ (adev->pdev->revision == 0x00)) {
+ max_sclk = 80000;
+ max_mclk = 95000;
+ }
} else if (adev->asic_type == CHIP_OLAND) {
if ((adev->pdev->revision == 0xC7) ||
(adev->pdev->revision == 0x80) ||