<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/tools/testing/selftests/powerpc, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2018-03-02T00:37:04Z</updated>
<entry>
<title>selftests/powerpc: Skip the subpage_prot tests if the syscall is unavailable</title>
<updated>2018-03-02T00:37:04Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2018-02-26T04:22:22Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cd4a6f3ab4d80cb919d15897eb3cbc85c2009d4b'/>
<id>urn:sha1:cd4a6f3ab4d80cb919d15897eb3cbc85c2009d4b</id>
<content type='text'>
The subpage_prot syscall is only functional when the system is using
the Hash MMU. Since commit 5b2b80714796 ("powerpc/mm: Invalidate
subpage_prot() system call on radix platforms") it returns ENOENT when
the Radix MMU is active. Currently this just makes the test fail.

Additionally the syscall is not available if the kernel is built with
4K pages, or if CONFIG_PPC_SUBPAGE_PROT=n, in which case it returns
ENOSYS because the syscall is missing entirely.

So check explicitly for ENOENT and ENOSYS and skip if we see either of
those.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Fix missing clean of pmu/lib.o</title>
<updated>2018-02-28T11:28:35Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2018-02-28T04:15:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b7abbd5a3533a31a1e7d4696ea275df543440c51'/>
<id>urn:sha1:b7abbd5a3533a31a1e7d4696ea275df543440c51</id>
<content type='text'>
The tm-resched-dscr test links against pmu/lib.o, but we don't have a
rule to clean pmu/lib.o. This can lead to a build break if you build
for big endian and then little, or vice versa.

Fix it by making tm-resched-dscr depend on pmu/lib.c, causing the code
to be built directly in, meaning no .o is generated.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Skip tm-trap if transactional memory is not enabled</title>
<updated>2018-02-26T02:18:25Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2018-02-26T02:17:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=192b2e742c06af399e8eecb4a1726520bfccece8'/>
<id>urn:sha1:192b2e742c06af399e8eecb4a1726520bfccece8</id>
<content type='text'>
Some processor revisions do not support transactional memory, and
additionally kernel support can be disabled. In either case the
tm-trap test should be skipped, otherwise it will fail with a SIGILL.

Fixes: a08082f8e4e1 ("powerpc/selftests: Check endianness on trap in TM")
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Fix to use ucontext_t instead of struct ucontext</title>
<updated>2018-02-13T11:44:18Z</updated>
<author>
<name>Harish</name>
<email>harish@linux.vnet.ibm.com</email>
</author>
<published>2018-02-13T06:32:55Z</published>
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<id>urn:sha1:ecdf06e1ea5376bba03c155751f6869d3dfaa210</id>
<content type='text'>
With glibc 2.26 'struct ucontext' is removed to improve POSIX
compliance, which breaks powerpc/alignment_handler selftest. Fix the
test by using ucontext_t. Tested on ppc, works with older glibc
versions as well.

Fixes the following:
  alignment_handler.c: In function ‘sighandler’:
  alignment_handler.c:68:5: error: dereferencing pointer to incomplete type ‘struct ucontext’
    ucp-&gt;uc_mcontext.gp_regs[PT_NIP] += 4;

Signed-off-by: Harish &lt;harish@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/selftests: Check endianness on trap in TM</title>
<updated>2018-01-21T18:48:37Z</updated>
<author>
<name>Gustavo Romero</name>
<email>gromero@linux.vnet.ibm.com</email>
</author>
<published>2017-12-31T23:20:46Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a08082f8e4e1c292df174a9ed303cfbff2fbe2cb'/>
<id>urn:sha1:a08082f8e4e1c292df174a9ed303cfbff2fbe2cb</id>
<content type='text'>
Add a selftest to check if endianness is flipped inadvertently to BE
(MSR.LE set to zero) on BE and LE machines when a trap is caught in
transactional mode and load_fp and load_vec are zero, i.e. when MSR.FP
and MSR.VEC are zeroed (disabled).

Signed-off-by: Gustavo Romero &lt;gromero@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Add alignment handler selftest</title>
<updated>2018-01-21T18:48:34Z</updated>
<author>
<name>Andrew Donnellan</name>
<email>andrew.donnellan@au1.ibm.com</email>
</author>
<published>2017-10-16T05:04:02Z</published>
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<id>urn:sha1:8d1915873d492b8e1f03bbcab527db62a8d49542</id>
<content type='text'>
Add a selftest to exercise the powerpc alignment fault handler.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
[mpe: Add 32-bit support to the signal handler]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftest/powerpc: Add additional option to mmap_bench test</title>
<updated>2018-01-21T12:37:43Z</updated>
<author>
<name>Aneesh Kumar K.V</name>
<email>aneesh.kumar@linux.vnet.ibm.com</email>
</author>
<published>2017-11-28T08:36:39Z</published>
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<id>urn:sha1:be68fb64f763b7b6ddb202e0a931f41ae62f71b0</id>
<content type='text'>
This patch adds --pgfault and --iterations options to mmap_bench test. With
--pgfault we touch every page mapped. This helps in measuring impact in the
page fault path with a patch series.

Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Add a test of SEGV error behaviour</title>
<updated>2018-01-03T05:49:24Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2018-01-02T10:37:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6ed361586b323e576fd5536078fe9f2ee7906e61'/>
<id>urn:sha1:6ed361586b323e576fd5536078fe9f2ee7906e61</id>
<content type='text'>
Add a test case of the error code reported when we take a SEGV on a
mapped but inaccessible area. We broke this recently.

Based on a test case from John Sperbeck &lt;jsperbeck@google.com&gt;.

Acked-by: John Sperbeck &lt;jsperbeck@google.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Fix build errors in powerpc ptrace selftests</title>
<updated>2017-12-11T02:03:37Z</updated>
<author>
<name>Simon Guo</name>
<email>wei.guo.simon@gmail.com</email>
</author>
<published>2017-09-01T02:17:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f36dbfe1a504b85c7b3bf89fdd99991afbaa0f74'/>
<id>urn:sha1:f36dbfe1a504b85c7b3bf89fdd99991afbaa0f74</id>
<content type='text'>
GCC 7 will take "r2" in clobber list as an error and it will get
following build errors for powerpc ptrace selftests even with -fno-pic
option:
  ptrace-tm-vsx.c: In function ‘tm_vsx’:
  ptrace-tm-vsx.c:42:2: error: PIC register clobbered by ‘r2’ in ‘asm’
    asm __volatile__(
    ^~~
  make[1]: *** [ptrace-tm-vsx] Error 1
  ptrace-tm-spd-vsx.c: In function ‘tm_spd_vsx’:
  ptrace-tm-spd-vsx.c:55:2: error: PIC register clobbered by ‘r2’ in ‘asm’
    asm __volatile__(
    ^~~
  make[1]: *** [ptrace-tm-spd-vsx] Error 1
  ptrace-tm-spr.c: In function ‘tm_spr’:
  ptrace-tm-spr.c:46:2: error: PIC register clobbered by ‘r2’ in ‘asm’
    asm __volatile__(
    ^~~

Fix the build error by removing "r2" from the clobber list. None of
these asm blocks actually clobber r2.

Reported-by: Seth Forshee &lt;seth.forshee@canonical.com&gt;
Signed-off-by: Simon Guo &lt;wei.guo.simon@gmail.com&gt;
Tested-by: Seth Forshee &lt;seth.forshee@canonical.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Check for pthread errors in tm-unavailable</title>
<updated>2017-12-04T04:01:09Z</updated>
<author>
<name>Cyril Bur</name>
<email>cyrilbur@gmail.com</email>
</author>
<published>2017-11-21T07:17:19Z</published>
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<id>urn:sha1:5783ee6ec3d3323a04cc69764d57cac7bf026332</id>
<content type='text'>
Signed-off-by: Cyril Bur &lt;cyrilbur@gmail.com&gt;
Signed-off-by: Gustavo Romero &lt;gromero@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
</feed>
