kernel/tools/testing/selftests/powerpc/tm/tm-trap.c, branch linux-rolling-stable

selftests: Skip TM tests on synthetic TM implementations

2021-08-26T11:21:06Z

Transactional Memory was removed from the architecture in ISA v3.1. For threads running in P8/P9 compatibility mode on P10 a synthetic TM implementation is provided. In this implementation, tbegin. always sets cr0 eq meaning the abort handler is always called. This is not an issue as users of TM are expected to have a fallback non transactional way to make forward progress in the abort handler. The TEXASR indicates if a transaction failure is due to a synthetic implementation. Some of the TM self tests need a non-degenerate TM implementation for their testing to be meaningful so check for a synthetic implementation and skip the test if so. Signed-off-by: Jordan Niethe Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210729041317.366612-2-jniethe5@gmail.com

selftests/powerpc: unmark non-kernel-doc comments

2021-03-29T02:22:18Z

Drop the 'beginning of kernel-doc' notation markers (/**) in places that are not in kernel-doc format. Signed-off-by: Randy Dunlap Reviewed-by: Daniel Axtens Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210325200820.16594-1-rdunlap@infradead.org

selftests/powerpc: Fix TM tests when CPU 0 is offline

2020-09-08T12:23:42Z

Several of the TM tests fail spuriously if CPU 0 is offline, because they blindly try to affinitise to CPU 0. Fix them by picking any online CPU and using that instead. Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20200813013445.686464-1-mpe@ellerman.id.au

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 191

2019-05-30T18:29:21Z

Based on 1 normalized pattern(s): licensed under gplv2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 99 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Alexios Zavras Reviewed-by: Richard Fontana Reviewed-by: Allison Randal Reviewed-by: Steve Winslow Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.163048684@linutronix.de Signed-off-by: Greg Kroah-Hartman

selftests/powerpc: Skip tm-trap if transactional memory is not enabled

2018-02-26T02:18:25Z

Some processor revisions do not support transactional memory, and additionally kernel support can be disabled. In either case the tm-trap test should be skipped, otherwise it will fail with a SIGILL. Fixes: a08082f8e4e1 ("powerpc/selftests: Check endianness on trap in TM") Signed-off-by: Michael Ellerman

powerpc/selftests: Check endianness on trap in TM

2018-01-21T18:48:37Z

Add a selftest to check if endianness is flipped inadvertently to BE (MSR.LE set to zero) on BE and LE machines when a trap is caught in transactional mode and load_fp and load_vec are zero, i.e. when MSR.FP and MSR.VEC are zeroed (disabled). Signed-off-by: Gustavo Romero Signed-off-by: Michael Ellerman