<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/tools/testing/selftests/kvm/lib/kvm_util.c, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=master</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2026-02-11T17:45:00Z</updated>
<entry>
<title>Merge tag 'kvm-riscv-6.20-1' of https://github.com/kvm-riscv/linux into HEAD</title>
<updated>2026-02-11T17:45:00Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2026-02-09T18:05:42Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=54f15ebfc61ee8499a97f2dbfc18b1b13fdcb524'/>
<id>urn:sha1:54f15ebfc61ee8499a97f2dbfc18b1b13fdcb524</id>
<content type='text'>
KVM/riscv changes for 6.20

- Fixes for issues discoverd by KVM API fuzzing in
  kvm_riscv_aia_imsic_has_attr(), kvm_riscv_aia_imsic_rw_attr(),
  and kvm_riscv_vcpu_aia_imsic_update()
- Allow Zalasr, Zilsd and Zclsd extensions for Guest/VM
- Add riscv vm satp modes in KVM selftests
- Transparent huge page support for G-stage
- Adjust the number of available guest irq files based on
  MMIO register sizes in DeviceTree or ACPI
</content>
</entry>
<entry>
<title>Merge tag 'kvm-x86-selftests-6.20' of https://github.com/kvm-x86/linux into HEAD</title>
<updated>2026-02-09T17:38:54Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2026-02-09T17:38:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a0c468eda4386c67082973d21d811fd777a798ed'/>
<id>urn:sha1:a0c468eda4386c67082973d21d811fd777a798ed</id>
<content type='text'>
KVM selftests changes for 6.20

 - Add a regression test for TPR&lt;=&gt;CR8 synchronization and IRQ masking.

 - Overhaul selftest's MMU infrastructure to genericize stage-2 MMU support,
   and extend x86's infrastructure to support EPT and NPT (for L2 guests).

 - Extend several nested VMX tests to also cover nested SVM.

 - Add a selftest for nested VMLOAD/VMSAVE.

 - Rework the nested dirty log test, originally added as a regression test for
   PML where KVM logged L2 GPAs instead of L1 GPAs, to improve test coverage
   and to hopefully make the test easier to understand and maintain.
</content>
</entry>
<entry>
<title>KVM: riscv: selftests: Add riscv vm satp modes</title>
<updated>2026-02-06T13:35:23Z</updated>
<author>
<name>Wu Fei</name>
<email>wu.fei9@sanechips.com.cn</email>
</author>
<published>2025-11-05T15:14:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=39ad809dd2579d9b7400bbc50a5b95d84527b75e'/>
<id>urn:sha1:39ad809dd2579d9b7400bbc50a5b95d84527b75e</id>
<content type='text'>
Current vm modes cannot represent riscv guest modes precisely, here add
all 9 combinations of P(56,40,41) x V(57,48,39). Also the default vm
mode is detected on runtime instead of hardcoded one, which might not be
supported on specific machine.

Signed-off-by: Wu Fei &lt;wu.fei9@sanechips.com.cn&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Nutty Liu &lt;nutty.liu@hotmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20251105151442.28767-1-wu.fei9@sanechips.com.cn
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Fix typos and stale comments in kvm_util</title>
<updated>2026-01-15T13:39:53Z</updated>
<author>
<name>Fuad Tabba</name>
<email>tabba@google.com</email>
</author>
<published>2026-01-09T08:22:18Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e0a99a2b72f3c6365d9f4d6943ed45f7fc286b70'/>
<id>urn:sha1:e0a99a2b72f3c6365d9f4d6943ed45f7fc286b70</id>
<content type='text'>
Fix minor documentation errors in `kvm_util.h` and `kvm_util.c`.

- Correct the argument description for `vcpu_args_set` in `kvm_util.h`,
  which incorrectly listed `vm` instead of `vcpu`.
- Fix a typo in the comment for `kvm_selftest_arch_init` ("exeucting" -&gt;
  "executing").
- Correct the return value description for `vm_vaddr_unused_gap` in
  `kvm_util.c` to match the implementation, which returns an address "at
  or above" `vaddr_min`, not "at or below".

No functional change intended.

Reviewed-by: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Signed-off-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260109082218.3236580-6-tabba@google.com
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Add "struct kvm_mmu" to track a given MMU instance</title>
<updated>2026-01-08T20:02:08Z</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2025-12-30T23:01:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9f073ac25b4c4cf3b3ea13b155035108c54148bb'/>
<id>urn:sha1:9f073ac25b4c4cf3b3ea13b155035108c54148bb</id>
<content type='text'>
Add a "struct kvm_mmu" to track a given MMU instance, e.g. a VM's stage-1
MMU versus a VM's stage-2 MMU, so that x86 can share MMU functionality for
both stage-1 and stage-2 MMUs, without creating the potential for subtle
bugs, e.g. due to consuming on vm-&gt;pgtable_levels when operating a stage-2
MMU.

Encapsulate the existing de facto MMU in "struct kvm_vm", e.g instead of
burying the MMU details in "struct kvm_vm_arch", to avoid more #ifdefs in
____vm_create(), and in the hopes that other architectures can utilize the
formalized MMU structure if/when they too support stage-2 page tables.

No functional change intended.

Reviewed-by: Yosry Ahmed &lt;yosry.ahmed@linux.dev&gt;
Link: https://patch.msgid.link/20251230230150.4150236-7-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvmarm-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD</title>
<updated>2025-12-02T17:36:26Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2025-12-02T17:36:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f58e70cc31e3109b4f81688c74146702b05199c7'/>
<id>urn:sha1:f58e70cc31e3109b4f81688c74146702b05199c7</id>
<content type='text'>
KVM/arm64 updates for 6.19

 - Support for userspace handling of synchronous external aborts (SEAs),
   allowing the VMM to potentially handle the abort in a non-fatal
   manner.

 - Large rework of the VGIC's list register handling with the goal of
   supporting more active/pending IRQs than available list registers in
   hardware. In addition, the VGIC now supports EOImode==1 style
   deactivations for IRQs which may occur on a separate vCPU than the
   one that acked the IRQ.

 - Support for FEAT_XNX (user / privileged execute permissions) and
   FEAT_HAF (hardware update to the Access Flag) in the software page
   table walkers and shadow MMU.

 - Allow page table destruction to reschedule, fixing long need_resched
   latencies observed when destroying a large VM.

 - Minor fixes to KVM and selftests
</content>
</entry>
<entry>
<title>Merge branch 'kvm-arm64/nv-xnx-haf' into kvmarm/next</title>
<updated>2025-12-01T08:47:41Z</updated>
<author>
<name>Oliver Upton</name>
<email>oupton@kernel.org</email>
</author>
<published>2025-12-01T08:47:41Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3eef0c83c3f3e58933e98e678ddf4e95457d4d14'/>
<id>urn:sha1:3eef0c83c3f3e58933e98e678ddf4e95457d4d14</id>
<content type='text'>
* kvm-arm64/nv-xnx-haf: (22 commits)
  : Support for FEAT_XNX and FEAT_HAF in nested
  :
  : Add support for a couple of MMU-related features that weren't
  : implemented by KVM's software page table walk:
  :
  :  - FEAT_XNX: Allows the hypervisor to describe execute permissions
  :    separately for EL0 and EL1
  :
  :  - FEAT_HAF: Hardware update of the Access Flag, which in the context of
  :    nested means software walkers must also set the Access Flag.
  :
  : The series also adds some basic support for testing KVM's emulation of
  : the AT instruction, including the implementation detail that AT sets the
  : Access Flag in KVM.
  KVM: arm64: at: Update AF on software walk only if VM has FEAT_HAFDBS
  KVM: arm64: at: Use correct HA bit in TCR_EL2 when regime is EL2
  KVM: arm64: Document KVM_PGTABLE_PROT_{UX,PX}
  KVM: arm64: Fix spelling mistake "Unexpeced" -&gt; "Unexpected"
  KVM: arm64: Add break to default case in kvm_pgtable_stage2_pte_prot()
  KVM: arm64: Add endian casting to kvm_swap_s[12]_desc()
  KVM: arm64: Fix compilation when CONFIG_ARM64_USE_LSE_ATOMICS=n
  KVM: arm64: selftests: Add test for AT emulation
  KVM: arm64: nv: Expose hardware access flag management to NV guests
  KVM: arm64: nv: Implement HW access flag management in stage-2 SW PTW
  KVM: arm64: Implement HW access flag management in stage-1 SW PTW
  KVM: arm64: Propagate PTW errors up to AT emulation
  KVM: arm64: Add helper for swapping guest descriptor
  KVM: arm64: nv: Use pgtable definitions in stage-2 walk
  KVM: arm64: Handle endianness in read helper for emulated PTW
  KVM: arm64: nv: Stop passing vCPU through void ptr in S2 PTW
  KVM: arm64: Call helper for reading descriptors directly
  KVM: arm64: nv: Advertise support for FEAT_XNX
  KVM: arm64: Teach ptdump about FEAT_XNX permissions
  KVM: arm64: nv: Forward FEAT_XNX permissions to the shadow stage-2
  ...

Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: selftests: Add test for AT emulation</title>
<updated>2025-12-01T08:44:02Z</updated>
<author>
<name>Oliver Upton</name>
<email>oupton@kernel.org</email>
</author>
<published>2025-11-24T19:01:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=66f188858385d640163fbf866d9c11b7741da91a'/>
<id>urn:sha1:66f188858385d640163fbf866d9c11b7741da91a</id>
<content type='text'>
Add a basic test for AT emulation in the EL2&amp;0 and EL1&amp;0 translation
regimes.

Reviewed-by: Marc Zyngier &lt;maz@kernel.org&gt;
Tested-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://msgid.link/20251124190158.177318-16-oupton@kernel.org
Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvm-x86-selftests-6.19' of https://github.com/kvm-x86/linux into HEAD</title>
<updated>2025-11-26T08:35:40Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2025-11-26T08:35:40Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b0bf3d67a7f05169edb254f826c9f6052b883f2e'/>
<id>urn:sha1:b0bf3d67a7f05169edb254f826c9f6052b883f2e</id>
<content type='text'>
KVM selftests changes for 6.19:

 - Fix a math goof in mmu_stress_test when running on a single-CPU system/VM.

 - Forcefully override ARCH from x86_64 to x86 to play nice with specifying
   ARCH=x86_64 on the command line.

 - Extend a bunch of nested VMX to validate nested SVM as well.

 - Add support for LA57 in the core VM_MODE_xxx macro, and add a test to
   verify KVM can save/restore nested VMX state when L1 is using 5-level
   paging, but L2 is not.

 - Clean up the guest paging code in anticipation of sharing the core logic for
   nested EPT and nested NPT.
</content>
</entry>
<entry>
<title>KVM: selftests: Make sure vm-&gt;vpages_mapped is always up-to-date</title>
<updated>2025-11-21T18:17:05Z</updated>
<author>
<name>Yosry Ahmed</name>
<email>yosry.ahmed@linux.dev</email>
</author>
<published>2025-10-21T07:47:24Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d2e50389ab44acfa05e72604d701a70b234f9938'/>
<id>urn:sha1:d2e50389ab44acfa05e72604d701a70b234f9938</id>
<content type='text'>
Call paths leading to __virt_pg_map() are currently:
(a) virt_pg_map() -&gt; virt_arch_pg_map() -&gt; __virt_pg_map()
(b) virt_map_level() -&gt; __virt_pg_map()

For (a), calls to virt_pg_map() from kvm_util.c make sure they update
vm-&gt;vpages_mapped, but other callers do not. Move the sparsebit_set()
call into virt_pg_map() to make sure all callers are captured.

For (b), call sparsebit_set_num() from virt_map_level().

It's tempting to have a single the call inside __virt_pg_map(), however:
- The call path in (a) is not x86-specific, while (b) is. Moving the
  call into __virt_pg_map() would require doing something similar for
  other archs implementing virt_pg_map().

- Future changes will reusue __virt_pg_map() for nested PTEs, which should
  not update vm-&gt;vpages_mapped, i.e. a triple underscore version that does
  not update vm-&gt;vpages_mapped would need to be provided.

Signed-off-by: Yosry Ahmed &lt;yosry.ahmed@linux.dev&gt;
Link: https://patch.msgid.link/20251021074736.1324328-12-yosry.ahmed@linux.dev
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
</feed>
