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<title>kernel/tools/testing/selftests/kvm/lib/kvm_util.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2025-12-02T17:36:26Z</updated>
<entry>
<title>Merge tag 'kvmarm-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD</title>
<updated>2025-12-02T17:36:26Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2025-12-02T17:36:26Z</published>
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<id>urn:sha1:f58e70cc31e3109b4f81688c74146702b05199c7</id>
<content type='text'>
KVM/arm64 updates for 6.19

 - Support for userspace handling of synchronous external aborts (SEAs),
   allowing the VMM to potentially handle the abort in a non-fatal
   manner.

 - Large rework of the VGIC's list register handling with the goal of
   supporting more active/pending IRQs than available list registers in
   hardware. In addition, the VGIC now supports EOImode==1 style
   deactivations for IRQs which may occur on a separate vCPU than the
   one that acked the IRQ.

 - Support for FEAT_XNX (user / privileged execute permissions) and
   FEAT_HAF (hardware update to the Access Flag) in the software page
   table walkers and shadow MMU.

 - Allow page table destruction to reschedule, fixing long need_resched
   latencies observed when destroying a large VM.

 - Minor fixes to KVM and selftests
</content>
</entry>
<entry>
<title>Merge branch 'kvm-arm64/nv-xnx-haf' into kvmarm/next</title>
<updated>2025-12-01T08:47:41Z</updated>
<author>
<name>Oliver Upton</name>
<email>oupton@kernel.org</email>
</author>
<published>2025-12-01T08:47:41Z</published>
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<id>urn:sha1:3eef0c83c3f3e58933e98e678ddf4e95457d4d14</id>
<content type='text'>
* kvm-arm64/nv-xnx-haf: (22 commits)
  : Support for FEAT_XNX and FEAT_HAF in nested
  :
  : Add support for a couple of MMU-related features that weren't
  : implemented by KVM's software page table walk:
  :
  :  - FEAT_XNX: Allows the hypervisor to describe execute permissions
  :    separately for EL0 and EL1
  :
  :  - FEAT_HAF: Hardware update of the Access Flag, which in the context of
  :    nested means software walkers must also set the Access Flag.
  :
  : The series also adds some basic support for testing KVM's emulation of
  : the AT instruction, including the implementation detail that AT sets the
  : Access Flag in KVM.
  KVM: arm64: at: Update AF on software walk only if VM has FEAT_HAFDBS
  KVM: arm64: at: Use correct HA bit in TCR_EL2 when regime is EL2
  KVM: arm64: Document KVM_PGTABLE_PROT_{UX,PX}
  KVM: arm64: Fix spelling mistake "Unexpeced" -&gt; "Unexpected"
  KVM: arm64: Add break to default case in kvm_pgtable_stage2_pte_prot()
  KVM: arm64: Add endian casting to kvm_swap_s[12]_desc()
  KVM: arm64: Fix compilation when CONFIG_ARM64_USE_LSE_ATOMICS=n
  KVM: arm64: selftests: Add test for AT emulation
  KVM: arm64: nv: Expose hardware access flag management to NV guests
  KVM: arm64: nv: Implement HW access flag management in stage-2 SW PTW
  KVM: arm64: Implement HW access flag management in stage-1 SW PTW
  KVM: arm64: Propagate PTW errors up to AT emulation
  KVM: arm64: Add helper for swapping guest descriptor
  KVM: arm64: nv: Use pgtable definitions in stage-2 walk
  KVM: arm64: Handle endianness in read helper for emulated PTW
  KVM: arm64: nv: Stop passing vCPU through void ptr in S2 PTW
  KVM: arm64: Call helper for reading descriptors directly
  KVM: arm64: nv: Advertise support for FEAT_XNX
  KVM: arm64: Teach ptdump about FEAT_XNX permissions
  KVM: arm64: nv: Forward FEAT_XNX permissions to the shadow stage-2
  ...

Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: selftests: Add test for AT emulation</title>
<updated>2025-12-01T08:44:02Z</updated>
<author>
<name>Oliver Upton</name>
<email>oupton@kernel.org</email>
</author>
<published>2025-11-24T19:01:57Z</published>
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<id>urn:sha1:66f188858385d640163fbf866d9c11b7741da91a</id>
<content type='text'>
Add a basic test for AT emulation in the EL2&amp;0 and EL1&amp;0 translation
regimes.

Reviewed-by: Marc Zyngier &lt;maz@kernel.org&gt;
Tested-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://msgid.link/20251124190158.177318-16-oupton@kernel.org
Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvm-x86-selftests-6.19' of https://github.com/kvm-x86/linux into HEAD</title>
<updated>2025-11-26T08:35:40Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2025-11-26T08:35:40Z</published>
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<id>urn:sha1:b0bf3d67a7f05169edb254f826c9f6052b883f2e</id>
<content type='text'>
KVM selftests changes for 6.19:

 - Fix a math goof in mmu_stress_test when running on a single-CPU system/VM.

 - Forcefully override ARCH from x86_64 to x86 to play nice with specifying
   ARCH=x86_64 on the command line.

 - Extend a bunch of nested VMX to validate nested SVM as well.

 - Add support for LA57 in the core VM_MODE_xxx macro, and add a test to
   verify KVM can save/restore nested VMX state when L1 is using 5-level
   paging, but L2 is not.

 - Clean up the guest paging code in anticipation of sharing the core logic for
   nested EPT and nested NPT.
</content>
</entry>
<entry>
<title>KVM: selftests: Make sure vm-&gt;vpages_mapped is always up-to-date</title>
<updated>2025-11-21T18:17:05Z</updated>
<author>
<name>Yosry Ahmed</name>
<email>yosry.ahmed@linux.dev</email>
</author>
<published>2025-10-21T07:47:24Z</published>
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<id>urn:sha1:d2e50389ab44acfa05e72604d701a70b234f9938</id>
<content type='text'>
Call paths leading to __virt_pg_map() are currently:
(a) virt_pg_map() -&gt; virt_arch_pg_map() -&gt; __virt_pg_map()
(b) virt_map_level() -&gt; __virt_pg_map()

For (a), calls to virt_pg_map() from kvm_util.c make sure they update
vm-&gt;vpages_mapped, but other callers do not. Move the sparsebit_set()
call into virt_pg_map() to make sure all callers are captured.

For (b), call sparsebit_set_num() from virt_map_level().

It's tempting to have a single the call inside __virt_pg_map(), however:
- The call path in (a) is not x86-specific, while (b) is. Moving the
  call into __virt_pg_map() would require doing something similar for
  other archs implementing virt_pg_map().

- Future changes will reusue __virt_pg_map() for nested PTEs, which should
  not update vm-&gt;vpages_mapped, i.e. a triple underscore version that does
  not update vm-&gt;vpages_mapped would need to be provided.

Signed-off-by: Yosry Ahmed &lt;yosry.ahmed@linux.dev&gt;
Link: https://patch.msgid.link/20251021074736.1324328-12-yosry.ahmed@linux.dev
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Change VM_MODE_PXXV48_4K to VM_MODE_PXXVYY_4K</title>
<updated>2025-11-21T00:19:59Z</updated>
<author>
<name>Jim Mattson</name>
<email>jmattson@google.com</email>
</author>
<published>2025-10-28T22:30:41Z</published>
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<id>urn:sha1:ec5806639e39950527593e3be0efe7f0d7b65bf7</id>
<content type='text'>
Use 57-bit addresses with 5-level paging on hardware that supports
LA57. Continue to use 48-bit addresses with 4-level paging on hardware
that doesn't support LA57.

Suggested-by: Sean Christopherson &lt;seanjc@google.com&gt;
Signed-off-by: Jim Mattson &lt;jmattson@google.com&gt;
Link: https://patch.msgid.link/20251028225827.2269128-4-jmattson@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Test for KVM_EXIT_ARM_SEA</title>
<updated>2025-11-12T09:27:16Z</updated>
<author>
<name>Jiaqi Yan</name>
<email>jiaqiyan@google.com</email>
</author>
<published>2025-10-13T18:59:02Z</published>
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<id>urn:sha1:feee9ef7ac1648835c3b1e35ba4833cf7c8b3669</id>
<content type='text'>
Test how KVM handles guest SEA when APEI is unable to claim it, and
KVM_CAP_ARM_SEA_TO_USER is enabled.

The behavior is triggered by consuming recoverable memory error (UER)
injected via EINJ. The test asserts two major things:
1. KVM returns to userspace with KVM_EXIT_ARM_SEA exit reason, and
   has provided expected fault information, e.g. esr, flags, gva, gpa.
2. Userspace is able to handle KVM_EXIT_ARM_SEA by injecting SEA to
   guest and KVM injects expected SEA into the VCPU.

Tested on a data center server running Siryn AmpereOne processor
that has RAS support.

Several things to notice before attempting to run this selftest:
- The test relies on EINJ support in both firmware and kernel to
  inject UER. Otherwise the test will be skipped.
- The under-test platform's APEI should be unable to claim the SEA.
  Otherwise the test will be skipped.
- Some platform doesn't support notrigger in EINJ, which may cause
  APEI and GHES to offline the memory before guest can consume
  injected UER, and making test unable to trigger SEA.

Signed-off-by: Jiaqi Yan &lt;jiaqiyan@google.com&gt;
Link: https://msgid.link/20251013185903.1372553-3-jiaqiyan@google.com
Signed-off-by: Oliver Upton &lt;oupton@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Rename "guest_paddr" variables to "gpa"</title>
<updated>2025-11-03T20:54:21Z</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2025-10-07T22:36:25Z</published>
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<id>urn:sha1:83e0e12219a402bf7b8fdef067e51f945a92fd26</id>
<content type='text'>
Rename "guest_paddr" variables in vm_userspace_mem_region_add() and
vm_mem_add() to KVM's de facto standard "gpa", both for consistency and
to shorten line lengths.

Opportunistically fix the indentation of the
vm_userspace_mem_region_add() declaration.

Link: https://patch.msgid.link/20251007223625.369939-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Report stacktraces SIGBUS, SIGSEGV, SIGILL, and SIGFPE by default</title>
<updated>2025-10-20T13:30:42Z</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2025-10-16T17:28:48Z</published>
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<id>urn:sha1:29dc539d74abd1ec4e509fda29bc821f3586d333</id>
<content type='text'>
Register handlers for signals for all selftests that are likely happen due
to test (or kernel) bugs, and explicitly fail tests on unexpected signals
so that users get a stack trace, i.e. don't have to go spelunking to do
basic triage.

Register the handlers as early as possible, to catch as many unexpected
signals as possible, and also so that the common code doesn't clobber a
handler that's installed by test (or arch) code.

Tested-by: Ackerley Tng &lt;ackerleytng@google.com&gt;
Reviewed-by: Ackerley Tng &lt;ackerleytng@google.com&gt;
Reviewed-by: Shivank Garg &lt;shivankg@amd.com&gt;
Tested-by: Shivank Garg &lt;shivankg@amd.com&gt;
Link: https://lore.kernel.org/r/20251016172853.52451-8-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Define wrappers for common syscalls to assert success</title>
<updated>2025-10-20T13:30:42Z</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2025-10-16T17:28:47Z</published>
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<id>urn:sha1:3223560c93eb725f479fe20f462ce202a44803b8</id>
<content type='text'>
Add kvm_&lt;sycall&gt; wrappers for munmap(), close(), fallocate(), and
ftruncate() to cut down on boilerplate code when a sycall is expected
to succeed, and to make it easier for developers to remember to assert
success.

Implement and use a macro framework similar to the kernel's SYSCALL_DEFINE
infrastructure to further cut down on boilerplate code, and to drastically
reduce the probability of typos as the kernel's syscall definitions can be
copy+paste almost verbatim.

Provide macros to build the raw &lt;sycall&gt;() wrappers as well, e.g. to
replace hand-coded wrappers (NUMA) or pure open-coded calls.

Reviewed-by: Ackerley Tng &lt;ackerleytng@google.com&gt;
Tested-by: Ackerley Tng &lt;ackerleytng@google.com&gt;
Reviewed-by: Shivank Garg &lt;shivankg@amd.com&gt;
Tested-by: Shivank Garg &lt;shivankg@amd.com&gt;
Link: https://lore.kernel.org/r/20251016172853.52451-7-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
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