<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/tools/testing/selftests/kvm/lib/aarch64/processor.c, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
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<updated>2022-12-09T08:13:35Z</updated>
<entry>
<title>KVM: arm64: selftests: Align VA space allocator with TTBR0</title>
<updated>2022-12-09T08:13:35Z</updated>
<author>
<name>Oliver Upton</name>
<email>oliver.upton@linux.dev</email>
</author>
<published>2022-12-07T21:48:07Z</published>
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<id>urn:sha1:e8b9a055fa0481679132781db574ecb771960f16</id>
<content type='text'>
An interesting feature of the Arm architecture is that the stage-1 MMU
supports two distinct VA regions, controlled by TTBR{0,1}_EL1. As KVM
selftests on arm64 only uses TTBR0_EL1, the VA space is constrained to
[0, 2^(va_bits-1)). This is different from other architectures that
allow for addressing low and high regions of the VA space from a single
page table.

KVM selftests' VA space allocator presumes the valid address range is
split between low and high memory based the MSB, which of course is a
poor match for arm64's TTBR0 region.

Allow architectures to override the default VA space layout. Make use of
the override to align vpages_valid with the behavior of TTBR0 on arm64.

Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Message-Id: &lt;20221207214809.489070-4-oliver.upton@linux.dev&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvmarm-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD</title>
<updated>2022-12-09T08:12:12Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2022-12-06T17:27:39Z</published>
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<id>urn:sha1:eb5618911af0ac069d2313b289d4c19ca3379401</id>
<content type='text'>
KVM/arm64 updates for 6.2

- Enable the per-vcpu dirty-ring tracking mechanism, together with an
  option to keep the good old dirty log around for pages that are
  dirtied by something other than a vcpu.

- Switch to the relaxed parallel fault handling, using RCU to delay
  page table reclaim and giving better performance under load.

- Relax the MTE ABI, allowing a VMM to use the MAP_SHARED mapping
  option, which multi-process VMMs such as crosvm rely on.

- Merge the pKVM shadow vcpu state tracking that allows the hypervisor
  to have its own view of a vcpu, keeping that state private.

- Add support for the PMUv3p5 architecture revision, bringing support
  for 64bit counters on systems that support it, and fix the
  no-quite-compliant CHAIN-ed counter support for the machines that
  actually exist out there.

- Fix a handful of minor issues around 52bit VA/PA support (64kB pages
  only) as a prefix of the oncoming support for 4kB and 16kB pages.

- Add/Enable/Fix a bunch of selftests covering memslots, breakpoints,
  stage-2 faults and access tracking. You name it, we got it, we
  probably broke it.

- Pick a small set of documentation and spelling fixes, because no
  good merge window would be complete without those.

As a side effect, this tag also drags:

- The 'kvmarm-fixes-6.1-3' tag as a dependency to the dirty-ring
  series

- A shared branch with the arm64 tree that repaints all the system
  registers to match the ARM ARM's naming, and resulting in
  interesting conflicts
</content>
</entry>
<entry>
<title>Merge branch kvm-arm64/selftest/s2-faults into kvmarm-master/next</title>
<updated>2022-12-05T14:16:41Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2022-12-05T14:16:41Z</published>
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<id>urn:sha1:adde0476aff9c4d15df0c5738880bb8cbd44ad8b</id>
<content type='text'>
* kvm-arm64/selftest/s2-faults:
  : .
  : New KVM/arm64 selftests exercising various sorts of S2 faults, courtesy
  : of Ricardo Koller. From the cover letter:
  :
  : "This series adds a new aarch64 selftest for testing stage 2 fault handling
  : for various combinations of guest accesses (e.g., write, S1PTW), backing
  : sources (e.g., anon), and types of faults (e.g., read on hugetlbfs with a
  : hole, write on a readonly memslot). Each test tries a different combination
  : and then checks that the access results in the right behavior (e.g., uffd
  : faults with the right address and write/read flag). [...]"
  : .
  KVM: selftests: aarch64: Add mix of tests into page_fault_test
  KVM: selftests: aarch64: Add readonly memslot tests into page_fault_test
  KVM: selftests: aarch64: Add dirty logging tests into page_fault_test
  KVM: selftests: aarch64: Add userfaultfd tests into page_fault_test
  KVM: selftests: aarch64: Add aarch64/page_fault_test
  KVM: selftests: Use the right memslot for code, page-tables, and data allocations
  KVM: selftests: Fix alignment in virt_arch_pgd_alloc() and vm_vaddr_alloc()
  KVM: selftests: Add vm-&gt;memslots[] and enum kvm_mem_region_type
  KVM: selftests: Stash backing_src_type in struct userspace_mem_region
  tools: Copy bitfield.h from the kernel sources
  KVM: selftests: aarch64: Construct DEFAULT_MAIR_EL1 using sysreg.h macros
  KVM: selftests: Add missing close and munmap in __vm_mem_region_delete()
  KVM: selftests: aarch64: Add virt_get_pte_hva() library function
  KVM: selftests: Add a userfaultfd library

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Add arch specific initialization</title>
<updated>2022-11-17T00:58:57Z</updated>
<author>
<name>Vishal Annapurve</name>
<email>vannapurve@google.com</email>
</author>
<published>2022-11-15T21:38:44Z</published>
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<id>urn:sha1:e1ab31245c4efe973db4dcd6c82a41c2aec09b27</id>
<content type='text'>
Introduce arch specific API: kvm_selftest_arch_init to allow each arch to
handle initialization before running any selftest logic.

Suggested-by: Sean Christopherson &lt;seanjc@google.com&gt;
Reviewed-by: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Reviewed-by: Peter Gonda &lt;pgonda@google.com&gt;
Signed-off-by: Vishal Annapurve &lt;vannapurve@google.com&gt;
Link: https://lore.kernel.org/r/20221115213845.3348210-3-vannapurve@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
</entry>
<entry>
<title>KVM: selftests: Use the right memslot for code, page-tables, and data allocations</title>
<updated>2022-11-10T19:10:27Z</updated>
<author>
<name>Ricardo Koller</name>
<email>ricarkol@google.com</email>
</author>
<published>2022-10-17T19:58:29Z</published>
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<id>urn:sha1:1446e331432d7f24ed56b870ad605a4345fee43f</id>
<content type='text'>
Now that kvm_vm allows specifying different memslots for code, page tables,
and data, use the appropriate memslot when making allocations in
common/libraty code. Change them accordingly:

- code (allocated by lib/elf) use the CODE memslot
- stacks, exception tables, and other core data pages (like the TSS in x86)
  use the DATA memslot
- page tables and the PGD use the PT memslot
- test data (anything allocated with vm_vaddr_alloc()) uses the TEST_DATA
  memslot

No functional change intended. All allocators keep using memslot #0.

Cc: Sean Christopherson &lt;seanjc@google.com&gt;
Cc: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Signed-off-by: Ricardo Koller &lt;ricarkol@google.com&gt;
Reviewed-by: Sean Christopherson &lt;seanjc@google.com&gt;
Reviewed-by: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20221017195834.2295901-10-ricarkol@google.com
</content>
</entry>
<entry>
<title>KVM: selftests: Fix alignment in virt_arch_pgd_alloc() and vm_vaddr_alloc()</title>
<updated>2022-11-10T19:10:27Z</updated>
<author>
<name>Ricardo Koller</name>
<email>ricarkol@google.com</email>
</author>
<published>2022-10-17T19:58:28Z</published>
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<id>urn:sha1:5485e822e31a75dfac3713d94b6b22025d4895da</id>
<content type='text'>
Refactor virt_arch_pgd_alloc() and vm_vaddr_alloc() in both RISC-V and
aarch64 to fix the alignment of parameters in a couple of calls. This will
make it easier to fix the alignment in a future commit that adds an extra
parameter (that happens to be very long).

No functional change intended.

Suggested-by: Sean Christopherson &lt;seanjc@google.com&gt;
Signed-off-by: Ricardo Koller &lt;ricarkol@google.com&gt;
Reviewed-by: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20221017195834.2295901-9-ricarkol@google.com
</content>
</entry>
<entry>
<title>KVM: selftests: aarch64: Construct DEFAULT_MAIR_EL1 using sysreg.h macros</title>
<updated>2022-11-10T19:10:27Z</updated>
<author>
<name>Ricardo Koller</name>
<email>ricarkol@google.com</email>
</author>
<published>2022-10-17T19:58:24Z</published>
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<id>urn:sha1:41f5189ea9c08f7fc28340a7aefc93d0d2dcb769</id>
<content type='text'>
Define macros for memory type indexes and construct DEFAULT_MAIR_EL1
with macros from asm/sysreg.h.  The index macros can then be used when
constructing PTEs (instead of using raw numbers).

Reviewed-by: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Reviewed-by: Oliver Upton &lt;oupton@google.com&gt;
Signed-off-by: Ricardo Koller &lt;ricarkol@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20221017195834.2295901-5-ricarkol@google.com
</content>
</entry>
<entry>
<title>KVM: selftests: aarch64: Add virt_get_pte_hva() library function</title>
<updated>2022-11-10T19:10:27Z</updated>
<author>
<name>Ricardo Koller</name>
<email>ricarkol@google.com</email>
</author>
<published>2022-10-17T19:58:22Z</published>
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<id>urn:sha1:228f324dc718f702e8777164c4e2e7426824fb13</id>
<content type='text'>
Add a library function to get the PTE (a host virtual address) of a
given GVA.  This will be used in a future commit by a test to clear and
check the access flag of a particular page.

Reviewed-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Reviewed-by: Andrew Jones &lt;andrew.jones@linux.dev&gt;
Signed-off-by: Ricardo Koller &lt;ricarkol@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20221017195834.2295901-3-ricarkol@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: selftests: Use FIELD_GET() to extract ID register fields</title>
<updated>2022-11-10T19:03:54Z</updated>
<author>
<name>Reiji Watanabe</name>
<email>reijiw@google.com</email>
</author>
<published>2022-10-20T05:41:54Z</published>
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<id>urn:sha1:1a6182033f2d5c481aec1f8c1c26ebc649693d57</id>
<content type='text'>
Use FIELD_GET() macro to extract ID register fields for existing
aarch64 selftests code. No functional change intended.

Signed-off-by: Reiji Watanabe &lt;reijiw@google.com&gt;
Reviewed-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20221020054202.2119018-2-reijiw@google.com
</content>
</entry>
<entry>
<title>KVM: selftests: Sanity check input to ioctls() at build time</title>
<updated>2022-06-11T15:48:09Z</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2022-06-01T18:01:58Z</published>
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<id>urn:sha1:fcba483e82462830dd368951c0df03a95676f34d</id>
<content type='text'>
Add a static assert to the KVM/VM/vCPU ioctl() helpers to verify that the
size of the argument provided matches the expected size of the IOCTL.
Because ioctl() ultimately takes a "void *", it's all too easy to pass in
garbage and not detect the error until runtime.  E.g. while working on a
CPUID rework, selftests happily compiled when vcpu_set_cpuid()
unintentionally passed the cpuid() function as the parameter to ioctl()
(a local "cpuid" parameter was removed, but its use was not replaced with
"vcpu-&gt;cpuid" as intended).

Tweak a variety of benign issues that aren't compatible with the sanity
check, e.g. passing a non-pointer for ioctls().

Note, static_assert() requires a string on older versions of GCC.  Feed
it an empty string to make the compiler happy.

Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
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