<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/sound/soc/sof/intel/shim.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
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<updated>2022-11-23T15:32:05Z</updated>
<entry>
<title>ASoC: SOF: Intel: hda: add callback to check SoundWire lcount information</title>
<updated>2022-11-23T15:32:05Z</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2022-11-11T04:26:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=625339caaea15c0e69d833227652d2f5b6e365cc'/>
<id>urn:sha1:625339caaea15c0e69d833227652d2f5b6e365cc</id>
<content type='text'>
The number of links is stored in different registers depending on the
IP version, add sdw_check_lcount() callback. This callback only checks
that the number of links supported in hardware is compatible with the
number of links exposed in ACPI _DSD properties.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221111042653.45520-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: add per-chip enable_sdw_irq() callback</title>
<updated>2022-11-23T15:32:02Z</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2022-11-11T04:26:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=8ebc90741e96646af7320336ac4433eea175390a'/>
<id>urn:sha1:8ebc90741e96646af7320336ac4433eea175390a</id>
<content type='text'>
Different generations of Intel hardware rely on different programming
sequences to enable SoundWire IP. In existing hardware, the SoundWire
interrupt is enabled with a register field in the DSP register
space. With HDaudio multi-link extensions registers, the SoundWire
interrupt will be enabled with a generic interrupt enable field in
LCTL, without any dependency on the DSP being enabled.

Add a per-chip callback following the example of the check_sdw_irq()
model already upstream.

Note that the callback is not populated yet for MeteorLake (MTL) since
the interrupts are already enabled in the init. A follow-up patch will
move the functionality to this callback after a couple of cleanups.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221111042653.45520-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: add d0i3_offset in chip_info</title>
<updated>2022-11-07T17:10:07Z</updated>
<author>
<name>Rander Wang</name>
<email>rander.wang@intel.com</email>
</author>
<published>2022-11-07T16:41:53Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f8632adc53e25501c74f25794cddac4dbe3f1c59'/>
<id>urn:sha1:f8632adc53e25501c74f25794cddac4dbe3f1c59</id>
<content type='text'>
MTL has different d0i3 offset compared to cavs platforms.
Use d0i3_offset to unify the setting.

Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: Add a new op for disabling interrupts</title>
<updated>2022-09-23T12:56:16Z</updated>
<author>
<name>Ranjani Sridharan</name>
<email>ranjani.sridharan@linux.intel.com</email>
</author>
<published>2022-09-22T21:36:39Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=423693a6c351f4abb869d1dbf5df7374766aaa1a'/>
<id>urn:sha1:423693a6c351f4abb869d1dbf5df7374766aaa1a</id>
<content type='text'>
The sequence for disabling DSP interrupts varies between different IP
versions.

Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220922213644.666315-6-ranjani.sridharan@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: introduce new op to handle dsp power down</title>
<updated>2022-09-23T12:56:12Z</updated>
<author>
<name>Fred Oh</name>
<email>fred.oh@linux.intel.com</email>
</author>
<published>2022-09-22T21:36:35Z</published>
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<id>urn:sha1:af62eaf2872bf2c381f322c61f7ff751162797f6</id>
<content type='text'>
DSP core power down sequences are different between cavs platforms and MTL.

Signed-off-by: Fred Oh &lt;fred.oh@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220922213644.666315-2-ranjani.sridharan@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: Add support for MeteorLake (MTL)</title>
<updated>2022-06-15T08:56:57Z</updated>
<author>
<name>Bard Liao</name>
<email>yung-chuan.liao@linux.intel.com</email>
</author>
<published>2022-06-15T08:43:48Z</published>
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<id>urn:sha1:064520e8aeaa2569f6504a50a37ac801b73656bc</id>
<content type='text'>
Add platform abstraction for the Meteor Lake platform.

This platform has significant differences compared to the TGL/ADL
generation: it relies on new hardware using the code name 'ACE' and
only supports the INTEL_IPC4 protocol and firmware architecture based
on the Zephyr RTOS

Co-developed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Link: https://lore.kernel.org/r/20220615084348.3489-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOC: Intel: introduce cl_init callback</title>
<updated>2022-06-15T08:56:56Z</updated>
<author>
<name>Bard Liao</name>
<email>yung-chuan.liao@linux.intel.com</email>
</author>
<published>2022-06-15T08:43:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ab222a4aaecfafece1516c775143e1cb9eb31612'/>
<id>urn:sha1:ab222a4aaecfafece1516c775143e1cb9eb31612</id>
<content type='text'>
The code loader init sequences are different between versions of
Intel platforms. Have a cl_init callback allows us to reuse the
common code.
No function changed.

Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220615084348.3489-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: add IP identifier</title>
<updated>2022-04-19T11:03:46Z</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2022-04-14T18:48:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=03cf7262076f08601108cc896416fc1d66671994'/>
<id>urn:sha1:03cf7262076f08601108cc896416fc1d66671994</id>
<content type='text'>
This patch adds an IP identifier for each Intel platform. The
identifier will be used to select different code branches or
constants.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220414184817.362215-16-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: Define rom_status_reg in sof_intel_dsp_desc</title>
<updated>2022-04-19T11:03:44Z</updated>
<author>
<name>Ranjani Sridharan</name>
<email>ranjani.sridharan@linux.intel.com</email>
</author>
<published>2022-04-14T18:48:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=71778f7940f0b496aa1ca1134f3b70b425a59bab'/>
<id>urn:sha1:71778f7940f0b496aa1ca1134f3b70b425a59bab</id>
<content type='text'>
Add the rom_status_reg field to struct sof_intel_dsp_desc and define
it for HDA platforms. This will be used to check the ROM status during
FW boot.

Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220414184817.362215-14-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: define check_ipc_irq op</title>
<updated>2022-04-19T11:03:43Z</updated>
<author>
<name>Ranjani Sridharan</name>
<email>ranjani.sridharan@linux.intel.com</email>
</author>
<published>2022-04-14T18:48:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3dee239e02747a5d1447249ffb4a3c4425b9e302'/>
<id>urn:sha1:3dee239e02747a5d1447249ffb4a3c4425b9e302</id>
<content type='text'>
Define the check_ipc_irq op for HDA platforms and use it
when checking if it is an IPC IRQ.

Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220414184817.362215-13-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
