kernel/sound/soc/sof/intel/apl.c, branch linux-6.2.y

ASoC: SOF: Intel: add d0i3_offset in chip_info

2022-11-07T17:10:07Z

MTL has different d0i3 offset compared to cavs platforms. Use d0i3_offset to unify the setting. Reviewed-by: Ranjani Sridharan Signed-off-by: Rander Wang Signed-off-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Add ipc4 library loading implementation

2022-10-21T12:05:07Z

On Intel HDA platforms the library loading is done via DMA and an IPC message is also need to be sent to initiate the downloading of the new library. Co-developed-by: Ranjani Sridharan Signed-off-by: Ranjani Sridharan Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Chao Song Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20221020121238.18339-16-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: ipc4/Intel: Improve and enable IPC error dump

2022-09-23T19:46:25Z

Merge series from Peter Ujfalusi : On Intel platforms the registers for DSP communications are used differently, the IPC dump information is not correct since important registers are not printed and existing ones are used a bit differently for IPC4. As a last step, enable the IPC timeout 'handling' and allow the printout of the now usefull IPC dump.

ASoC: SOF: Intel: hda: Add separate ops for ipc_dump for IPC4

2022-09-23T13:53:18Z

The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Kai Vehmanen Reviewed-by: Rander Wang Link: https://lore.kernel.org/r/20220923133616.26267-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: define and set the disable_interrupts op for cavs platforms

2022-09-23T12:56:17Z

Disable the IPC and SDW nterrupts in the disable_interrupts op for cavs platforms. Signed-off-by: Ranjani Sridharan Reviewed-by: Bard Liao Reviewed-by: Rander Wang Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220922213644.666315-7-ranjani.sridharan@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: define and set power_down_dsp op for HDA platforms

2022-09-23T12:56:13Z

hda_power_down_dsp is set for power_down_dsp op for all HDA platforms. Signed-off-by: Fred Oh Reviewed-by: Rander Wang Reviewed-by: Bard Liao Signed-off-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20220922213644.666315-3-ranjani.sridharan@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Add mtrace type information for IPC4

2022-09-09T17:48:50Z

Set the mtrace type for platforms supported by IPC4. Note: currently only SOF_IPC4_MTRACE_INTEL_CAVS_2 type is supported by the ipc4-mtrace driver, which is used by CAVS 2.x platforms (ICL, TGL, ADL) and ACE (MTL). Signed-off-by: Peter Ujfalusi Reviewed-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20220909114332.31393-8-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOC: Intel: introduce cl_init callback

2022-06-15T08:56:56Z

The code loader init sequences are different between versions of Intel platforms. Have a cl_init callback allows us to reuse the common code. No function changed. Signed-off-by: Bard Liao Reviewed-by: Péter Ujfalusi Reviewed-by: Rander Wang Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20220615084348.3489-2-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: HDA: Set up sof_ipc4_fw_data for IPC4

2022-05-12T10:41:30Z

Allocate the sof_ipc4_fw_data struct for IPC4 and set the fw header offset for the platforms which will be used by the core when loading the firmware image. The core expects that the "private" field in struct snd_sof_dev (which is unused today with IPC3) is used to save this data. Signed-off-by: Ranjani Sridharan Reviewed-by: Bard Liao Reviewed-by: Rander Wang Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220511171648.1622993-6-ranjani.sridharan@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: HDA: Set IPC4-specific DSP ops for CaVS platforms

2022-05-12T10:41:25Z

Add implementation of low level, platform dependent IPC4 message handling and set the DSP ops for IPC4 for APL, CNL and TGL platforms. Co-developed-by: Peter Ujfalusi Signed-off-by: Peter Ujfalusi Reviewed-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Bard Liao Signed-off-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20220511171648.1622993-2-ranjani.sridharan@linux.intel.com Signed-off-by: Mark Brown