<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/sound/soc/codecs/lpass-rx-macro.c, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
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<updated>2023-04-13T15:02:36Z</updated>
<entry>
<title>ASoC: codecs: lpass: fix the order or clks turn off during suspend</title>
<updated>2023-04-13T15:02:36Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2023-03-23T11:01:25Z</published>
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<id>urn:sha1:f78320a6523ea2f37ad610c8fb58293a8d7ad335</id>
<content type='text'>
[ Upstream commit a4a3203426f4b67535d6442ddc5dca8878a0678f ]

The order in which clocks are stopped matters as some of the clock
like NPL are derived from MCLK.

Without this patch, Dragonboard RB5 DSP would crash with below error:
 qcom_q6v5_pas 17300000.remoteproc: fatal error received:
 ABT_dal.c:278:ABTimeout: AHB Bus hang is detected,
 Number of bus hang detected := 2 , addr0 = 0x3370000 , addr1 = 0x0!!!

Turn off  fsgen first, followed by npl and then finally mclk, which is exactly
the opposite order of enable sequence.

Fixes: 1dc3459009c3 ("ASoC: codecs: lpass: register mclk after runtime pm")
Reported-by: Amit Pundir &lt;amit.pundir@linaro.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Tested-by: Amit Pundir &lt;amit.pundir@linaro.org&gt;
Link: https://lore.kernel.org/r/20230323110125.23790-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: lpass: fix incorrect mclk rate</title>
<updated>2023-03-10T08:28:39Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2023-02-09T12:28:04Z</published>
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<id>urn:sha1:335ed52e265bdb7f0b66ee09885632f3407b7ccb</id>
<content type='text'>
[ Upstream commit e7621434378c40b62ef858c14ae6415fb6469a8e ]

For some reason we ended up with incorrect mclk rate which should be
1920000 instead of 96000, So far we were getting lucky as the same clk
is set to 192000 by wsa and va macro. This issue is discovered when there
is no wsa macro active and only rx or tx path is tested.
Fix this by setting correct rate.

Fixes: c39667ddcfc5 ("ASoC: codecs: lpass-tx-macro: add support for lpass tx macro")
Fixes: af3d54b99764 ("ASoC: codecs: lpass-rx-macro: add support for lpass rx macro")
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20230209122806.18923-7-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: lpass: register mclk after runtime pm</title>
<updated>2023-03-10T08:28:38Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2023-02-09T12:28:03Z</published>
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<id>urn:sha1:4b322e30dfbb1b0ae012c9593d8307520295ff81</id>
<content type='text'>
[ Upstream commit 1dc3459009c33e335f0d62b84dd39a6bbd7fd5d2 ]

move mclk out registration after runtime pm is enabled so that the
clk framework can resume the codec if it requires to enable the mclk out.

Fixes: c96baa2949b2 ("ASoC: codecs: wsa-macro: add runtime pm support")
Fixes: 72ad25eabda0 ("ASoC: codecs: va-macro: add runtime pm support")
Fixes: 366ff79ed539 ("ASoC: codecs: rx-macro: add runtime pm support")
Fixes: 1fb83bc5cf64 ("ASoC: codecs: tx-macro: add runtime pm support")
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20230209122806.18923-6-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: rx-macro: add support for sm8450 and sc8280xp</title>
<updated>2022-09-23T13:25:08Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2022-09-06T17:01:10Z</published>
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<id>urn:sha1:c0bcaa72fabab1f2900aecc8643f33212c0072cc</id>
<content type='text'>
Add compatible for sm8450 and sc8280xp.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220906170112.1984-11-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: rx-macro: handle swr_reset correctly</title>
<updated>2022-09-23T13:24:59Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2022-09-06T17:01:02Z</published>
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<id>urn:sha1:1a4e73915a7553d7ffb4f365b8a671bb2fa1f7ef</id>
<content type='text'>
Reset soundwire block on frame sync generation clock reset.
Without this we are hitting read/write timeouts randomly during
runtime pm. Along with this remove a swr_reset redundant flag.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220906170112.1984-3-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: Fix an error handling path in (rx|tx|va)_macro_probe()</title>
<updated>2022-04-08T14:43:55Z</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2022-04-03T06:58:27Z</published>
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<id>urn:sha1:ddfd534528146660de75ee84d6db10f10e778f95</id>
<content type='text'>
After a successful lpass_macro_pds_init() call, lpass_macro_pds_exit() must
be called.

Add the missing call in the error handling path of the probe function and
use it.

Fixes: 9e3d83c52844 ("ASoC: codecs: Add power domains support in digital macro codecs")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Link: https://lore.kernel.org/r/5b5a015a9b1dc8011c6a4053fa49da1f2531e47c.1648969065.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'asoc-v5.18' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus</title>
<updated>2022-03-21T15:19:21Z</updated>
<author>
<name>Takashi Iwai</name>
<email>tiwai@suse.de</email>
</author>
<published>2022-03-21T15:19:21Z</published>
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<id>urn:sha1:646b907e1559f006c79a752ee3eebe220ceb983d</id>
<content type='text'>
ASoC: Updates for v5.18

Quite a quiet release for ASoC, lots of work on drivers and platforms
but nothing too groundbreaking but not much on the core itself:

 - Start of moving SoF to support multiple IPC mechanisms.
 - Use of NHLT ACPI table to reduce the amount of quirking required for
   Intel systems.
 - Some building blocks for use in forthcoming Intel AVS driver for
   legacy Intel DSP firmwares.
 - Support for AMD PDM, Atmel PDMC, Awinic AW8738, i.MX cards with
   TLV320AIC31xx, Intel machines with CS35L41 and ESSX8336, Mediatek
   MT8181 wideband bluetooth, nVidia Tegra234, Qualcomm SC7280, Renesas
   RZ/V2L, Texas Instruments TAS585M
</content>
</entry>
<entry>
<title>ASoC: codecs: Add power domains support in digital macro codecs</title>
<updated>2022-02-28T13:30:37Z</updated>
<author>
<name>Srinivasa Rao Mandadapu</name>
<email>quic_srivasam@quicinc.com</email>
</author>
<published>2022-02-26T18:09:18Z</published>
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<id>urn:sha1:9e3d83c52844f955aa2975f78cee48bf9f72f5e1</id>
<content type='text'>
Add support for enabling required power domains in digital macro codecs.
macro and dcodec power domains are being requested as clocks by HLOS
in ADSP based architectures and ADSP internally handling as powerdomains.
In ADSP bypass case need to handle them as power domains explicitly.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Link: https://lore.kernel.org/r/1645898959-11231-2-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: rx-macro: add runtime pm support</title>
<updated>2022-02-25T13:51:10Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2022-02-24T11:17:14Z</published>
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<id>urn:sha1:366ff79ed5392ac518fd43cb44f82f63b87c313e</id>
<content type='text'>
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220224111718.6264-13-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: codecs: rx-macro: setup soundwire clks correctly</title>
<updated>2022-02-25T13:51:07Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2022-02-24T11:17:11Z</published>
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<id>urn:sha1:eaba113430d6c5e2c74fc8061fbd86efc000e99c</id>
<content type='text'>
For SoundWire Frame sync to be generated correctly we need both MCLK
and MCLKx2 (npl). Without pm runtime enabled these two clocks will remain on,
however after adding pm runtime support its possible that NPl clock could be
turned off even when SoundWire controller is active.

Fix this by enabling mclk and npl clk when SoundWire clks are enabled.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220224111718.6264-10-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
