kernel/sound/soc/codecs/da7219.h, branch linux-6.2.y

ASoC: da7219: Fix clock handling around codec level probe

2020-08-17T17:48:45Z

Previously the driver would use devm_* related functions at the codec level probe() to allocate clock resources for MCLK and the DAI clocks exposed by the device. This caused issues when registering clocks on a re-probe (no device level remove/prove involved) as the devm_* resources were never freed up so the clocks were still registered from the previous codec level probe(). This commit updates the clock handling for MCLK usage and DAI clock provision to fix this discrepancy and allow the codec level probe/remove functionality to operate as intended. Signed-off-by: Adam Thomson Link: https://lore.kernel.org/r/b92c461baeed27a6cd92e59e36a55c2547218683.1597164865.git.Adam.Thomson.Opensource@diasemi.com Signed-off-by: Mark Brown

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

ASoC: da7219: Expose BCLK and WCLK control through CCF

2019-03-21T14:50:17Z

For the purposes of platforms which use the codec as DAI clock master for the CPU and other codec devices, there is the need to not only expose the clock gating of BCLK and WCLK but also the ability to set those rates without going through the ASoC APIs. To make this possible, the previous CCF implementation in the driver has been extended to separate BCLK and WCLK out. WCLK is the parent clock to BCLK, and is also the clock gate for both. BCLK in HW is a factor/multiplier of WCLK so derives from whatever SR is chosen for WCLK, hence the need to make it a child of WCLK for the purposes of CCF. Enabling/disabling either BCLK or WCLK will result in clocks being ungated/gated accordingly. To simplify matters, these clocks can only be configured if the codec is set as master, otherwise CCF control is disallowed. Signed-off-by: Adam Thomson Signed-off-by: Mark Brown

ASoC: da7219: Add support for master mode BCLK rate adjustment

2019-02-14T14:48:07Z

Previously the driver would default the BCLK periods per WCLK to 64, to cover all possible non-TDM scenarios when the codec was DAI clock master. However some devices require a lower BCLK rate to operate correctly so with this in mind, this commit updates the code to be more dynamic, with BCLK rate now based on SR and word length provided to hw_params(). Signed-off-by: Adam Thomson Signed-off-by: Mark Brown

ASoC: da7219: Add recalc_rate function to return DAI clock rate

2019-01-09T14:39:19Z

By making MCLK parent of DAI clocks, when querying the rate of the clock the rate returned is now given from the parent clock so gives the MCLK rate rather than 0 as previously returned. This is a bit misleading, and actually there's no major reason why we can't at least return the DAI WCLK rate, as set in HW, so that's what we now do. Signed-off-by: Adam Thomson Signed-off-by: Mark Brown

ASoC: da7219: Add delays to capture path to remove DC offset noise

2018-08-09T09:50:14Z

On some platforms it has been noted that a pop noise can be witnessed when capturing audio, mainly for first time after a headset jack has been inserted. This is due to a DC offset in the Mic PGA and so to avoid this delays are required when powering up the capture path. This commit rectifies the problem by adding delays post Mic PGA and post Mixin PGA. The post Mic PGA delay is determined based on Mic Bias voltage, and is only applied the first time after a headset jack is inserted. Signed-off-by: Adam Thomson Signed-off-by: Mark Brown

ASoC: da7219: Add common clock usage for providing DAI clks

2018-03-09T17:40:41Z

There is a need to use DA7219 as DAI clock master for other codecs within a system, which means that the DAI clocks are required to remain, regardless of whether the codec is actually running playback/capture. To be able to expose control of the DAI clocking the common clock framework has been employed. The current implementation adds a simple clock gate for enabling and disabling the DAI clocks, with no rate control supported (this is still handled through standard hw_params() functions as before). If DT is enabled then the clock is added to the OF providers list, otherwise a clkdev lookup is used. Signed-off-by: Adam Thomson Signed-off-by: Mark Brown

ASoC: hdac_hdmi/nau8825/rt286/rt298/rt5663/da7219: replace codec to component

2018-02-12T11:11:56Z

Now we can replace Codec to Component. Let's do it. Because intal/rockchip boards are using multi-codecs in 1 driver, we need to update these all related drivers in same time. Otherwise compile error/warning happen Note: hdac_hdmi xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 1 -> .idle_bias_on = 0 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 nau8825 xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 0 -> .idle_bias_on = 1 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 rt286 xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 1 -> .idle_bias_on = 0 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 rt298 xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 1 -> .idle_bias_on = 0 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 rt5663 xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 1 -> .idle_bias_on = 0 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 da7219 xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 0 -> .idle_bias_on = 1 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 Signed-off-by: Kuninori Morimoto Signed-off-by: Mark Brown

ASoC: da7219: Fix HP detection procedure for all MCLK frequencies

2017-06-19T15:39:15Z

Currently when HP detection procedure runs for certain MCLK frequencies, when PLL is bypassed, the procedure will incorrectly report Lineout instead of Headphones due to timing incosistencies. To avoid this problem, the PLL is temporarily enabled (if currently bypassed and MCLK present) to provide consistent timings for the procedure, regardless of MCLK frequency. Signed-off-by: Adam Thomson Acked-by: Sathyanarayana Nujella Signed-off-by: Mark Brown

ASoC: da7219: Improve pop/click performance for sensitive HPs

2016-10-05T11:53:11Z

Currently on some headsets slight pops can be heard during DAPM power-up/down. This can also be witnessed during the HP detect procedure. This patch addresses the issue by adjusting DAPM power sequencing slightly, the introduction of delays and use of minimum HP gain to avoid such noise artefacts. Signed-off-by: Adam Thomson Signed-off-by: Mark Brown