<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/video/imx-ipu-v3.h, branch linux-5.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2019-03-09T22:45:54Z</updated>
<entry>
<title>Merge tag 'media/v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media</title>
<updated>2019-03-09T22:45:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-03-09T22:45:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=96a6de1a541c86e9e67b9c310c14db4099bd1cbc'/>
<id>urn:sha1:96a6de1a541c86e9e67b9c310c14db4099bd1cbc</id>
<content type='text'>
Pull media updates from Mauro Carvalho Chehab:

 - remove sensor drivers that got converted from soc_camera

 - remaining soc_camera drivers got moved to staging

 - some documentation cleanups and improvements

 - the imx staging driver now supports imx7

 - the ov9640, mt9m001 and mt9m111 got converted from soc_camera

 - the vim2m driver now does what a m2m convert driver expects to do

 - epoll() fixes on media subsystems

 - several drivers fixes, typos, cleanups and improvements

* tag 'media/v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (346 commits)
  media: dvb/earth-pt1: fix wrong initialization for demod blocks
  media: vim2m: Address some coding style issues
  media: vim2m: don't use BUG()
  media: vim2m: speedup passthrough copy
  media: vim2m: add an horizontal scaler
  media: vim2m: don't accept YUYV anymore as output format
  media: vim2m: add vertical linear scaler
  media: vim2m: better handle cap/out buffers with different sizes
  media: vim2m: use different framesizes for bayer formats
  media: vim2m: add support for VIDIOC_ENUM_FRAMESIZES
  media: vim2m: ensure that width is multiple of two
  media: vim2m: improve debug messages
  media: vim2m: add bayer capture formats
  media: a few more typos at staging, pci, platform, radio and usb
  media: Documentation: fix several typos
  media: staging: fix several typos
  media: include: fix several typos
  media: common: fix several typos
  media: v4l2-core: fix several typos
  media: usb: fix several typos
  ...
</content>
</entry>
<entry>
<title>gpu: ipu-v3: prg: add function to get channel configure status</title>
<updated>2019-02-22T10:58:45Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2018-09-11T13:26:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4bfbd561fc7d3758873ebfc38b0043065acb77f1'/>
<id>urn:sha1:4bfbd561fc7d3758873ebfc38b0043065acb77f1</id>
<content type='text'>
This allows channels using the PRG to check if a requested configuration
update has been applied or is still pending.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
[p.zabel@pengutronix.de: inverted logic: done -&gt; pending]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>media: gpu: ipu-v3: Add planar support to interlaced scan</title>
<updated>2019-01-16T19:12:20Z</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2019-01-09T18:30:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9b5c8d5ffb20cc4f4b1476cb1ad57e0f9b934788'/>
<id>urn:sha1:9b5c8d5ffb20cc4f4b1476cb1ad57e0f9b934788</id>
<content type='text'>
To support interlaced scan with planar formats, cpmem SLUV must
be programmed with the correct chroma line stride. For full and
partial planar 4:2:2 (YUV422P, NV16), chroma line stride must
be doubled. For full and partial planar 4:2:0 (YUV420, YVU420, NV12),
chroma line stride must _not_ be doubled, since a single chroma line
is shared by two luma lines.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Hans Verkuil &lt;hverkuil-cisco@xs4all.nl&gt;
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+samsung@kernel.org&gt;
</content>
</entry>
<entry>
<title>media: gpu: ipu-csi: Swap fields according to input/output field types</title>
<updated>2019-01-16T19:11:42Z</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2019-01-09T18:30:05Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fc8c723852380b0f4349bb06cf553a6bba47462e'/>
<id>urn:sha1:fc8c723852380b0f4349bb06cf553a6bba47462e</id>
<content type='text'>
The function ipu_csi_init_interface() was inverting the F-bit for
NTSC case, in the CCIR_CODE_1/2 registers. The result being that
for NTSC bottom-top field order, the CSI would swap fields and
capture in top-bottom order.

Instead, base field swap on the field order of the input to the CSI,
and the field order of the requested output. If the input/output
fields are sequential but different, swap fields, otherwise do
not swap. This requires passing both the input and output mbus
frame formats to ipu_csi_init_interface().

Move this code to a new private function ipu_csi_set_bt_interlaced_codes()
that programs the CCIR_CODE_1/2 registers for interlaced BT.656 (and
possibly interlaced BT.1120 in the future).

When detecting input video standard from the input frame width/height,
make sure to double height if input field type is alternate, since
in that case input height only includes lines for one field.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Hans Verkuil &lt;hverkuil-cisco@xs4all.nl&gt;
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+samsung@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: ipu-ic: allow to manually set resize coefficients</title>
<updated>2018-11-05T13:40:06Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2018-09-18T09:34:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d0cbc93a0110a82ff9e01d3c21d5a2e2027b706f'/>
<id>urn:sha1:d0cbc93a0110a82ff9e01d3c21d5a2e2027b706f</id>
<content type='text'>
For tiled scaling, we want to compute the scaling coefficients
externally in such a way that the interpolation overshoots tile
boundaries and samples up to the first pixel of the next tile.
Prepare to override the resizing coefficients from the image
conversion code.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Acked-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Tested-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Add chroma plane offset overrides to ipu_cpmem_set_image()</title>
<updated>2018-11-05T13:40:06Z</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2018-10-06T21:45:48Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=dec408fd23ae81338a55556cd570dacd6bf41046'/>
<id>urn:sha1:dec408fd23ae81338a55556cd570dacd6bf41046</id>
<content type='text'>
Allow the caller of ipu_cpmem_set_image() to override the latters
calculation of the chroma plane offsets, by adding override U/V
plane offsets to 'struct ipu_image'.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Tested-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: prg: add modifier support</title>
<updated>2017-12-19T11:49:11Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2017-11-10T16:09:59Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a2ceec52d9a48bd046e5496e266dda1c57872f4b'/>
<id>urn:sha1:a2ceec52d9a48bd046e5496e266dda1c57872f4b</id>
<content type='text'>
Allow to pass through the modifier to the PRE unit and extend the
format check with the supported modifiers.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Add support for double read/write reduction</title>
<updated>2017-06-08T06:57:18Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2014-09-17T13:44:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e1e9733cd37908a9ba61e29154561f0c81420e06'/>
<id>urn:sha1:e1e9733cd37908a9ba61e29154561f0c81420e06</id>
<content type='text'>
Allow to skip writing odd chroma rows by setting the RDRW bit for
4:2:0 chroma subsampled formats for any IDMAC write channel. This
also allows to skip reading odd rows for the VDIC read channel.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: add driver for Prefetch Resolve Gasket</title>
<updated>2017-03-16T09:14:02Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2017-03-08T11:13:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ea9c260514c15f14d43a4c099646c44238dccf1e'/>
<id>urn:sha1:ea9c260514c15f14d43a4c099646c44238dccf1e</id>
<content type='text'>
This adds support for the i.MX6 QUadPlus PRG unit. It glues together the
IPU and the PRE units.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
---
v4: add missing ipu_soc-&gt;prg_priv
</content>
</entry>
<entry>
<title>gpu: ipu-v3: add support for separate alpha channels</title>
<updated>2017-03-15T14:42:31Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2015-01-09T10:03:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e72db3b1e50febff493bc5e3fb57da9cb8cc3d91'/>
<id>urn:sha1:e72db3b1e50febff493bc5e3fb57da9cb8cc3d91</id>
<content type='text'>
The IPUv3 can read 8-bit alpha values from a separate IDMAC channel driven
by the Alpha Transparency Controller (ATC) for the graphics IDMAC channels.
This allows to reduce memory bandwidth via a conditional read mechanism or
to support planar YUV formats with alpha transparency.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
</feed>
