kernel/include/uapi/linux/dpll.h, branch linux-6.11.yHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.11.y2024-11-08T15:30:47Zdpll: add Embedded SYNC feature for a pin2024-11-08T15:30:47ZArkadiusz Kubalewskiarkadiusz.kubalewski@intel.com2024-08-22T22:25:12Zurn:sha1:3820fc3eddd62889369ecd3a448eb072ccbb7f32
[ Upstream commit cda1fba15cb2282b3c364805c9767698f11c3b0e ]
Implement and document new pin attributes for providing Embedded SYNC
capabilities to the DPLL subsystem users through a netlink pin-get
do/dump messages. Allow the user to set Embedded SYNC frequency with
pin-set do netlink message.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Link: https://patch.msgid.link/20240822222513.255179-2-arkadiusz.kubalewski@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Stable-dep-of: 6e58c3310622 ("ice: fix crash on probe for DPLL enabled E810 LOM")
Signed-off-by: Sasha Levin <sashal@kernel.org>
dpll: extend uapi by lock status error attribute2024-02-01T14:39:44ZJiri Pirkojiri@nvidia.com2024-01-30T12:08:29Zurn:sha1:cf4f0f1e1c465da7c1f6bc89c3ff50bf42f0ab02
If the dpll devices goes to state "unlocked" or "holdover", it may be
caused by an error. In that case, allow user to see what the error was.
Introduce a new attribute and values it can carry.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
dpll: expose fractional frequency offset value to user2024-01-05T15:58:19ZJiri Pirkojiri@nvidia.com2024-01-03T13:28:36Zurn:sha1:8a6286c1804e2c7144aef3154a0357c4b496e10b
Add a new netlink attribute to expose fractional frequency offset value
for a pin. Add an op to get the value from the driver.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Acked-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Link: https://lore.kernel.org/r/20240103132838.1501801-2-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
dpll: spec: add support for pin-dpll signal phase offset/adjust2023-10-15T15:08:24ZArkadiusz Kubalewskiarkadiusz.kubalewski@intel.com2023-10-11T10:12:33Zurn:sha1:c3c6ab95c397134bf5948f18743b3ba8008e7c47
Add attributes for providing the user with:
- measurement of signals phase offset between pin and dpll
- ability to adjust the phase of pin signal
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
dpll: spec: Add Netlink spec in YAML2023-09-17T10:50:20ZVadim Fedorenkovadim.fedorenko@linux.dev2023-09-13T20:49:36Zurn:sha1:3badff3a25d815e915d89565a0c82dec608a8d2b
Add a protocol spec for DPLL.
Add code generated from the spec.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>