<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/uapi/drm/radeon_drm.h, branch linux-3.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-3.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-3.17.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2014-08-18T21:09:43Z</updated>
<entry>
<title>drm/radeon: properly document reloc priority mask</title>
<updated>2014-08-18T21:09:43Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2014-08-15T09:52:53Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=701e1e789142042144c8cc10b8f6d1554e960144'/>
<id>urn:sha1:701e1e789142042144c8cc10b8f6d1554e960144</id>
<content type='text'>
Instead of hard coding the value properly document
that this is an userspace interface.

No intended functional change.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitly</title>
<updated>2014-08-05T12:53:32Z</updated>
<author>
<name>Michel Dänzer</name>
<email>michel.daenzer@amd.com</email>
</author>
<published>2014-07-17T10:01:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=77497f2735ad6e29c55475e15e9790dbfa2c2ef8'/>
<id>urn:sha1:77497f2735ad6e29c55475e15e9790dbfa2c2ef8</id>
<content type='text'>
Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: add query for number of active CUs</title>
<updated>2014-06-10T02:06:55Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2014-06-02T20:13:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=65fcf668ee7f2de2fbd580e1297336045f1ef6f4'/>
<id>urn:sha1:65fcf668ee7f2de2fbd580e1297336045f1ef6f4</id>
<content type='text'>
Query to find out how many compute units on a GPU.
Useful for OpenCL usermode drivers.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: track memory statistics about VRAM and GTT usage and buffer moves v2</title>
<updated>2014-03-03T09:54:19Z</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2014-03-01T23:56:18Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=67e8e3f970ad747d3c854fb40f8ec0cecedd9089'/>
<id>urn:sha1:67e8e3f970ad747d3c854fb40f8ec0cecedd9089</id>
<content type='text'>
The statistics are:
- VRAM usage in bytes
- GTT usage in bytes
- number of bytes moved by TTM

The last one is actually a counter, so you need to sample it before and after
command submission and take the difference.

This is useful for finding performance bottlenecks. Userspace queries are
also added.

v2: use atomic64_t

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: add a way to get and set initial buffer domains v2</title>
<updated>2014-03-03T09:53:01Z</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2014-03-01T23:56:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=bda72d58a20120aee1f78eb17d7eddb955d6696b'/>
<id>urn:sha1:bda72d58a20120aee1f78eb17d7eddb955d6696b</id>
<content type='text'>
When passing buffers between processes, the receiving process needs to know
the original buffer domain, so that it doesn't accidentally move the buffer.

v2: reserve the buffer

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: add VCE version parsing and checking</title>
<updated>2014-02-18T15:11:26Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2014-01-23T16:50:49Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=98ccc291ffdc34ccb9b13f0c29cc51d6eab24022'/>
<id>urn:sha1:98ccc291ffdc34ccb9b13f0c29cc51d6eab24022</id>
<content type='text'>
Also make the result available to userspace.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: initial VCE support v4</title>
<updated>2014-02-18T15:11:22Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2013-05-23T10:10:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d93f79376f210e0b19da57a3dc841ba332daa9d0'/>
<id>urn:sha1:d93f79376f210e0b19da57a3dc841ba332daa9d0</id>
<content type='text'>
Only VCE 2.0 support so far.

v2: squashing multiple patches into this one
v3: add IRQ support for CIK, major cleanups,
    basic code documentation
v4: remove HAINAN from chipset list

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: add query to fetch the max engine clock (v2)</title>
<updated>2014-01-20T23:20:29Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2014-01-20T23:20:29Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f5f1f897c892cbff6135cd743df9989ca7bc29e4'/>
<id>urn:sha1:f5f1f897c892cbff6135cd743df9989ca7bc29e4</id>
<content type='text'>
This is needed for reporting the max GPU engine clock
in OpenCL.  This just reports the max possible engine
clock, it does not take into account current conditions
that may limit that clock.

v2: fix query number for merge with 3.13

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/radeon: expose render backend mask to the userspace</title>
<updated>2013-12-23T15:03:43Z</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2013-12-22T01:18:01Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=439a1cfffe2c1a06e5a6394ccd5d18a8e89b15d3'/>
<id>urn:sha1:439a1cfffe2c1a06e5a6394ccd5d18a8e89b15d3</id>
<content type='text'>
This will allow userspace to correctly program the PA_SC_RASTER_CONFIG
register, so it can be considered a fix.

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/radeon/cik: Add macrotile mode array query</title>
<updated>2013-11-18T14:19:36Z</updated>
<author>
<name>Michel Dänzer</name>
<email>michel.daenzer@amd.com</email>
</author>
<published>2013-11-18T09:26:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=32f79a8a82b2ff6f1828b258da214869adc2a28c'/>
<id>urn:sha1:32f79a8a82b2ff6f1828b258da214869adc2a28c</id>
<content type='text'>
This is required to properly calculate the tiling parameters
in userspace.

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
