<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/include/soc, branch linux-6.8.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.8.y</id>
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<updated>2024-03-26T22:16:34Z</updated>
<entry>
<title>soc: qcom: socinfo: rename PM2250 to PM4125</title>
<updated>2024-03-26T22:16:34Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2024-01-28T01:32:44Z</published>
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<id>urn:sha1:0901889dabb25ebbd1d299284a8156971968ff71</id>
<content type='text'>
[ Upstream commit 5155e48128826d0c5999dc9f47aa746df54da448 ]

It seems, the only actual mentions of PM2250 can be found are related to
the Qualcomm RB1 platform. However even RB1 schematics use PM4125 as a
PMIC name. Rename PM2250 to PM4125 to follow the documentation.

Fixes: 082f9bc60f33 ("soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs")
Fixes: 112d96fd2927 ("soc: qcom: socinfo: Add some PMICs")
Acked-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20240128-pm2250-pm4125-rename-v2-1-d51987e9f83a@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mfd-next-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd</title>
<updated>2024-01-17T23:21:21Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-01-17T23:21:21Z</published>
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<id>urn:sha1:2385018a4e5eb4f06cf110cca80d0a4ac8e27297</id>
<content type='text'>
Pull mfd updates from Lee Jones:
 "New Device Support:
   - Add support for Qualcomm PM8937 PMIC to QCOM SPMI PMIC

  Fix-ups:
   - Use/convert to new/better APIs/helpers/MACROs instead of
     hand-rolling implementations
   - Device Tree binding adaptions/conversions/creation
   - Improve error handling; return proper error values, simplify,
     avoid duplicates, etc
   - Continue work to remove superfluous platform .remove() call-backs
   - Move some exported symbols into private namespaces
   - Clean-up and staticify PM related operations
   - Trivial; spelling, whitespace, clean-ups, etc
   - Fix include lists; alphabetise, remove unused, explicitly add used

  Bug Fixes:
   - Use PLATFORM_DEVID_AUTO to ensure multiple duplicate devices can
     co-exist
   - Ensure debugfs register view is correctly presented
   - Fix ordering and value issues in current use of
     clk_register_fractional_divider()
   - Repair Kconfig based dependency lists"

* tag 'mfd-next-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (50 commits)
  mfd: ti_am335x_tscadc: Fix TI SoC dependencies
  dt-bindings: mfd: sprd: Add support for UMS9620
  mfd: ab8500-sysctrl: Drop ancient charger
  mfd: intel-lpss: Fix the fractional clock divider flags
  mfd: tps6594: Add null pointer check to tps6594_device_init()
  dt-bindings: mfd: pm8008: Clean up example node names
  dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Clean up example
  dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Fix regulator binding
  dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Fix up binding reference
  mfd: da9062: Simplify obtaining I2C match data
  mfd: syscon: Fix null pointer dereference in of_syscon_register()
  mfd: intel-lpss: Don't fail probe on success of pci_alloc_irq_vectors()
  mfd: twl6030-irq: Revert to use of_match_device()
  mfd: cs42l43: Correct order of include files to be alphabetical
  mfd: cs42l43: Correct SoundWire port list
  mfd: Fix a few spelling mistakes in PMIC header file comments
  mfd: intel-lpss: Provide Intel LPSS PM ops structure
  mfd: intel-lpss: Move exported symbols to INTEL_LPSS namespace
  mfd: intel-lpss: Adjust header inclusions
  mfd: intel-lpss: Use device_get_match_data()
  ...
</content>
</entry>
<entry>
<title>Merge tag 'memory-controller-drv-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers</title>
<updated>2023-12-22T11:27:02Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2023-12-22T11:27:02Z</published>
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<id>urn:sha1:8d446ff13a2abcfa39b6dcb28f10145db7c77818</id>
<content type='text'>
Memory controller drivers for v6.8

Few improvements for Tegra Memory Controller: Override the SID
programming in the device, if firmware or bootloader left it in bypass
mode, e.g. after resuming from suspend.  Skip prorgamming the SID, if
given Memory Controller client does not support it.

* tag 'memory-controller-drv-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra: Protect SID override call under CONFIG_IOMMU_API
  memory: tegra: Skip SID programming if SID registers aren't set
  memory: tegra: Add SID override programming for MC clients

Link: https://lore.kernel.org/r/20231213061523.4803-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers</title>
<updated>2023-12-22T11:22:16Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2023-12-22T11:22:16Z</published>
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<id>urn:sha1:cd845dfd46b015191d7a6c9226cf0911a9b395a4</id>
<content type='text'>
RISC-V SoC drivers for v6.8

There's only one set of changes here, the addition of "Auto Update"
support for PolarFire SoC. Auto Update is one of the ways that the FPGA
bitstream can be updated, and the only one suitable for use from Linux
as it does not immediately initiate a reboot when started.
The driver was not accepted in the FPGA manager subsystem as the update
only occurs after a reboot and makes no use of the FPGA manager
framework.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

* tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  MAINTAINERS: add auto-update driver to mpfs entry
  firmware: microchip: Replace of_device.h with explicit include
  firmware: microchip: add PolarFire SoC Auto Update support
  soc: microchip: mpfs: add auto-update subdev to system controller
  soc: microchip: mpfs: print service status in warning message
  soc: microchip: mpfs: enable access to the system controller's flash
  dt-bindings: soc: microchip: add a property for system controller flash
  firmware_loader: Expand Firmware upload error codes with firmware invalid error

Link: https://lore.kernel.org/r/20231221-droop-unblock-81e4fe14acee@spud
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime</title>
<updated>2023-12-12T09:29:20Z</updated>
<author>
<name>Herve Codina</name>
<email>herve.codina@bootlin.com</email>
</author>
<published>2023-12-05T15:21:14Z</published>
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<id>urn:sha1:7a2ee1576dcc6bbe017a8283fba237b05b13fd15</id>
<content type='text'>
Introduce qmc_chan_{get,set}_ts_info() function to allow timeslots
modification at runtime.

The modification is provided using qmc_chan_set_ts_info() and will be
applied on next qmc_chan_start().
qmc_chan_set_ts_info() must be called with the channel rx and/or tx
stopped.

Signed-off-by: Herve Codina &lt;herve.codina@bootlin.com&gt;
Reviewed-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Link: https://lore.kernel.org/r/20231205152116.122512-18-herve.codina@bootlin.com
</content>
</entry>
<entry>
<title>soc: fsl: cpm1: qmc: Add support for child devices</title>
<updated>2023-12-12T09:29:20Z</updated>
<author>
<name>Herve Codina</name>
<email>herve.codina@bootlin.com</email>
</author>
<published>2023-12-05T15:21:03Z</published>
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<id>urn:sha1:ba3b7e4753c5ad80b3670277a2104aeb421e0d7d</id>
<content type='text'>
QMC child devices support is needed to avoid orphan DT nodes that use a
simple DT phandle to reference a QMC channel.

Allow to instantiate child devices and also extend the API to get the
qmc_chan using a child device.

Signed-off-by: Herve Codina &lt;herve.codina@bootlin.com&gt;
Link: https://lore.kernel.org/r/20231205152116.122512-7-herve.codina@bootlin.com
</content>
</entry>
<entry>
<title>soc: fsl: cpm1: qmc: Extend the API to provide Rx status</title>
<updated>2023-12-12T09:29:20Z</updated>
<author>
<name>Herve Codina</name>
<email>herve.codina@bootlin.com</email>
</author>
<published>2023-12-05T15:21:01Z</published>
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<id>urn:sha1:0e034aec5be2e8b1199b87b04d32e4a8b805a9db</id>
<content type='text'>
In HDLC mode, some status flags related to the data read transfer can be
set by the hardware and need to be known by a QMC consumer for further
analysis.

Extend the API in order to provide these transfer status flags at the
read complete() call.

In TRANSPARENT mode, these flags have no meaning. Keep only one read
complete() API and update the consumers working in transparent mode.
In this case, the newly introduced flags parameter is simply unused.

Signed-off-by: Herve Codina &lt;herve.codina@bootlin.com&gt;
Reviewed-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Link: https://lore.kernel.org/r/20231205152116.122512-5-herve.codina@bootlin.com
</content>
</entry>
<entry>
<title>mfd: qcom-spmi-pmic: Add support for PM8937</title>
<updated>2023-12-07T13:50:28Z</updated>
<author>
<name>Dang Huynh</name>
<email>danct12@riseup.net</email>
</author>
<published>2023-11-21T05:34:59Z</published>
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<id>urn:sha1:4773d2f1a5c73c590c0c83bf42b156532bc69cb2</id>
<content type='text'>
Add the subtype and compatible strings for PM8937.

The PM8937 is found in various SoCs, including MSM8917, MSM8937,
MSM8940 and APQ variants.

Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
Signed-off-by: Dang Huynh &lt;danct12@riseup.net&gt;
Link: https://lore.kernel.org/r/20231121-pm8937-v2-1-b0171ab62075@riseup.net
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc: microchip: mpfs: enable access to the system controller's flash</title>
<updated>2023-12-06T12:06:18Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-10-20T13:18:40Z</published>
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<id>urn:sha1:742aa6c563d29c367edbf0ef7236a7a853ed9be4</id>
<content type='text'>
The system controller has a flash that contains images used to reprogram
the FPGA using IAP (In-Application Programming).
Introduce a function that allows a driver with a reference to the system
controller to get one to a flash device attached to it.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Add SID override programming for MC clients</title>
<updated>2023-11-21T09:09:28Z</updated>
<author>
<name>Ashish Mhetre</name>
<email>amhetre@nvidia.com</email>
</author>
<published>2023-11-07T11:27:12Z</published>
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<id>urn:sha1:fe3b082a6eb8b1526ed7397c849d6b2a6baeb6a1</id>
<content type='text'>
For some devices the bootloader/firmware may set up the device in
bypass. Memory clients like display needs kernel to program SID after
resume because bootloader/firmware programs the SID of display device to
bypass. In order to make sure that kernel IOMMU mappings for these
devices work after resume, add SID override programming support for all
memory clients on memory controller resume.

This partially reverts 'commit ef86b2c2807f ("memory: tegra: Remove
clients SID override programming")'

Signed-off-by: Ashish Mhetre &lt;amhetre@nvidia.com&gt;
Link: https://lore.kernel.org/r/20231107112713.21399-1-amhetre@nvidia.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
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